Graph-based representations and coupled verification of VLSI schematics and layouts

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1990.

Bibliographic Details
Main Author: Bamji, Cyrus S
Other Authors: Jonathan Allen.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2005
Subjects:
Online Access:http://hdl.handle.net/1721.1/13999
_version_ 1826207439689613312
author Bamji, Cyrus S
author2 Jonathan Allen.
author_facet Jonathan Allen.
Bamji, Cyrus S
author_sort Bamji, Cyrus S
collection MIT
description Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1990.
first_indexed 2024-09-23T13:50:00Z
format Thesis
id mit-1721.1/13999
institution Massachusetts Institute of Technology
language eng
last_indexed 2024-09-23T13:50:00Z
publishDate 2005
publisher Massachusetts Institute of Technology
record_format dspace
spelling mit-1721.1/139992019-04-12T15:58:01Z Graph-based representations and coupled verification of VLSI schematics and layouts Bamji, Cyrus S Jonathan Allen. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1990. Includes bibliographical references (leaves 193-196). by Cyrus S. Bamji. Ph.D. 2005-08-10T18:57:40Z 2005-08-10T18:57:40Z 1989 1990 Thesis http://hdl.handle.net/1721.1/13999 23117187 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 196 leaves 14621940 bytes 14621696 bytes application/pdf application/pdf application/pdf Massachusetts Institute of Technology
spellingShingle Electrical Engineering and Computer Science.
Bamji, Cyrus S
Graph-based representations and coupled verification of VLSI schematics and layouts
title Graph-based representations and coupled verification of VLSI schematics and layouts
title_full Graph-based representations and coupled verification of VLSI schematics and layouts
title_fullStr Graph-based representations and coupled verification of VLSI schematics and layouts
title_full_unstemmed Graph-based representations and coupled verification of VLSI schematics and layouts
title_short Graph-based representations and coupled verification of VLSI schematics and layouts
title_sort graph based representations and coupled verification of vlsi schematics and layouts
topic Electrical Engineering and Computer Science.
url http://hdl.handle.net/1721.1/13999
work_keys_str_mv AT bamjicyruss graphbasedrepresentationsandcoupledverificationofvlsischematicsandlayouts