VeGen: A Vectorizer Generator for SIMD and Beyond
Vector instructions are ubiquitous in modern processors. Traditional compiler auto-vectorization techniques have focused on targeting single instruction multiple data (SIMD) instructions. However, these auto-vectorization techniques are not sufficiently powerful to model non-SIMD vector instructions...
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| Other Authors: | |
| Format: | Thesis |
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Massachusetts Institute of Technology
2022
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| Online Access: | https://hdl.handle.net/1721.1/140040 |
| _version_ | 1826204898124890112 |
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| author | Chen, Yishen |
| author2 | Amarasinghe, Saman |
| author_facet | Amarasinghe, Saman Chen, Yishen |
| author_sort | Chen, Yishen |
| collection | MIT |
| description | Vector instructions are ubiquitous in modern processors. Traditional compiler auto-vectorization techniques have focused on targeting single instruction multiple data (SIMD) instructions. However, these auto-vectorization techniques are not sufficiently powerful to model non-SIMD vector instructions, which can accelerate applications in domains such as image processing, digital signal processing, and machine learning. To target non-SIMD instruction, compiler developers have resorted to complicated, ad hoc peephole optimizations, expending significant development time while still coming up short. As vector instruction sets continue to rapidly evolve, compilers cannot keep up with these new hardware capabilities.
To facilitate the adaption of complex non-SIMD vector instructions, I propose a new model of vector parallelism that captures the semantics of these instructions and a new framework extracting this new model of vector parallelism automatically based on the formal semantics of the non-SIMD instructions. |
| first_indexed | 2024-09-23T13:02:47Z |
| format | Thesis |
| id | mit-1721.1/140040 |
| institution | Massachusetts Institute of Technology |
| last_indexed | 2024-09-23T13:02:47Z |
| publishDate | 2022 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/1400402022-02-08T03:33:15Z VeGen: A Vectorizer Generator for SIMD and Beyond Chen, Yishen Amarasinghe, Saman Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Vector instructions are ubiquitous in modern processors. Traditional compiler auto-vectorization techniques have focused on targeting single instruction multiple data (SIMD) instructions. However, these auto-vectorization techniques are not sufficiently powerful to model non-SIMD vector instructions, which can accelerate applications in domains such as image processing, digital signal processing, and machine learning. To target non-SIMD instruction, compiler developers have resorted to complicated, ad hoc peephole optimizations, expending significant development time while still coming up short. As vector instruction sets continue to rapidly evolve, compilers cannot keep up with these new hardware capabilities. To facilitate the adaption of complex non-SIMD vector instructions, I propose a new model of vector parallelism that captures the semantics of these instructions and a new framework extracting this new model of vector parallelism automatically based on the formal semantics of the non-SIMD instructions. S.M. 2022-02-07T15:20:29Z 2022-02-07T15:20:29Z 2021-09 2021-09-21T19:54:12.652Z Thesis https://hdl.handle.net/1721.1/140040 In Copyright - Educational Use Permitted Copyright MIT http://rightsstatements.org/page/InC-EDU/1.0/ application/pdf Massachusetts Institute of Technology |
| spellingShingle | Chen, Yishen VeGen: A Vectorizer Generator for SIMD and Beyond |
| title | VeGen: A Vectorizer Generator for SIMD and Beyond |
| title_full | VeGen: A Vectorizer Generator for SIMD and Beyond |
| title_fullStr | VeGen: A Vectorizer Generator for SIMD and Beyond |
| title_full_unstemmed | VeGen: A Vectorizer Generator for SIMD and Beyond |
| title_short | VeGen: A Vectorizer Generator for SIMD and Beyond |
| title_sort | vegen a vectorizer generator for simd and beyond |
| url | https://hdl.handle.net/1721.1/140040 |
| work_keys_str_mv | AT chenyishen vegenavectorizergeneratorforsimdandbeyond |