Optimizing Vector Instruction Selection for Digital Signal Processing
Digital signal processing applications benefit from fast implementations of vectorized inner kernels. Existing compilers rely on brittle pattern-matching or search-based methods with poor scalability for vector instruction selection – techniques which are limited by a reliance on the syntax of the i...
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| Other Authors: | |
| Format: | Thesis |
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Massachusetts Institute of Technology
2022
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| Online Access: | https://hdl.handle.net/1721.1/144935 |
| _version_ | 1826208641161625600 |
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| author | Root, Alexander James |
| author2 | Ragan-Kelley, Jonathan |
| author_facet | Ragan-Kelley, Jonathan Root, Alexander James |
| author_sort | Root, Alexander James |
| collection | MIT |
| description | Digital signal processing applications benefit from fast implementations of vectorized inner kernels. Existing compilers rely on brittle pattern-matching or search-based methods with poor scalability for vector instruction selection – techniques which are limited by a reliance on the syntax of the input code. These techniques struggle to utilize the efficient fused instructions that exist on modern hardware.
This thesis extends the Rake synthesis-based optimizing compiler to target the ARM Neon ISA via the design of a high-level intermediate representation for vector computation, with each component of the IR unifying multiple concrete instructions for the target ISA. This technique relies on the semantics of the input code, rather than the syntax alone, allowing for powerful equivalent rewrites that existing compilers are currently incapable of performing.
On 11 real-world benchmarks, our system achieves up to a 65% faster runtime (geometric mean of 12%) than the Halide and LLVM vector instruction selectors that have been developed over the past decade. |
| first_indexed | 2024-09-23T14:08:32Z |
| format | Thesis |
| id | mit-1721.1/144935 |
| institution | Massachusetts Institute of Technology |
| last_indexed | 2024-09-23T14:08:32Z |
| publishDate | 2022 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/1449352022-08-30T03:22:22Z Optimizing Vector Instruction Selection for Digital Signal Processing Root, Alexander James Ragan-Kelley, Jonathan Adams, Andrew Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Digital signal processing applications benefit from fast implementations of vectorized inner kernels. Existing compilers rely on brittle pattern-matching or search-based methods with poor scalability for vector instruction selection – techniques which are limited by a reliance on the syntax of the input code. These techniques struggle to utilize the efficient fused instructions that exist on modern hardware. This thesis extends the Rake synthesis-based optimizing compiler to target the ARM Neon ISA via the design of a high-level intermediate representation for vector computation, with each component of the IR unifying multiple concrete instructions for the target ISA. This technique relies on the semantics of the input code, rather than the syntax alone, allowing for powerful equivalent rewrites that existing compilers are currently incapable of performing. On 11 real-world benchmarks, our system achieves up to a 65% faster runtime (geometric mean of 12%) than the Halide and LLVM vector instruction selectors that have been developed over the past decade. M.Eng. 2022-08-29T16:22:07Z 2022-08-29T16:22:07Z 2022-05 2022-05-27T16:19:05.625Z Thesis https://hdl.handle.net/1721.1/144935 In Copyright - Educational Use Permitted Copyright MIT http://rightsstatements.org/page/InC-EDU/1.0/ application/pdf Massachusetts Institute of Technology |
| spellingShingle | Root, Alexander James Optimizing Vector Instruction Selection for Digital Signal Processing |
| title | Optimizing Vector Instruction Selection for Digital Signal Processing |
| title_full | Optimizing Vector Instruction Selection for Digital Signal Processing |
| title_fullStr | Optimizing Vector Instruction Selection for Digital Signal Processing |
| title_full_unstemmed | Optimizing Vector Instruction Selection for Digital Signal Processing |
| title_short | Optimizing Vector Instruction Selection for Digital Signal Processing |
| title_sort | optimizing vector instruction selection for digital signal processing |
| url | https://hdl.handle.net/1721.1/144935 |
| work_keys_str_mv | AT rootalexanderjames optimizingvectorinstructionselectionfordigitalsignalprocessing |