Dribble-Back Registers: A Technique for Latency Tolerance in Multiprocessors
As parallel machines grow in scale and complexity, latency tolerance of synchronization faults and remote memory accesses becomes increasingly important. One method for tolerating this by multithreading the processor and rapidly context switching between these threads. Fast context switching is most...
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2023
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| Online Access: | https://hdl.handle.net/1721.1/149199 |