A Multiprocessor Emulation Facility

Interest in multiprocessor computer architectures has increased dramatically in the last ten years. However, it has become clear that, in order to effectively use multiprocessors in a general way, some fundamental changes in the model of computation are necessary. Moreover, experimentation in the f...

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Main Authors: Arvind, Dertouzos, Michael L., Lannucci, Robert A.
Published: 2023
Online Access:https://hdl.handle.net/1721.1/149578
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author Arvind,
Dertouzos, Michael L.
Lannucci, Robert A.
author_facet Arvind,
Dertouzos, Michael L.
Lannucci, Robert A.
author_sort Arvind,
collection MIT
description Interest in multiprocessor computer architectures has increased dramatically in the last ten years. However, it has become clear that, in order to effectively use multiprocessors in a general way, some fundamental changes in the model of computation are necessary. Moreover, experimentation in the field is hindered by low-performance simulation tools and high-cost hardware modeling schemes.
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spelling mit-1721.1/1495782023-03-30T03:05:29Z A Multiprocessor Emulation Facility Arvind, Dertouzos, Michael L. Lannucci, Robert A. Interest in multiprocessor computer architectures has increased dramatically in the last ten years. However, it has become clear that, in order to effectively use multiprocessors in a general way, some fundamental changes in the model of computation are necessary. Moreover, experimentation in the field is hindered by low-performance simulation tools and high-cost hardware modeling schemes. 2023-03-29T15:09:41Z 2023-03-29T15:09:41Z 1983-10 https://hdl.handle.net/1721.1/149578 11325545 MIT-LCS-TR-302 application/pdf
spellingShingle Arvind,
Dertouzos, Michael L.
Lannucci, Robert A.
A Multiprocessor Emulation Facility
title A Multiprocessor Emulation Facility
title_full A Multiprocessor Emulation Facility
title_fullStr A Multiprocessor Emulation Facility
title_full_unstemmed A Multiprocessor Emulation Facility
title_short A Multiprocessor Emulation Facility
title_sort multiprocessor emulation facility
url https://hdl.handle.net/1721.1/149578
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