Exploiting Parallelism in VLSI CAD
In the domain of computer science, particularly VLSI CAD, an increasing amount of engineering time is spent running compute-bound programs. Many of these programs have an intrinsic parallelism that is externally accessible. This thesis describes a novel software system that uses a small number of...
| Main Author: | |
|---|---|
| Other Authors: | |
| Published: |
2023
|
| Online Access: | https://hdl.handle.net/1721.1/149631 |
| _version_ | 1826203500313313280 |
|---|---|
| author | Marantz, Joshua David |
| author2 | Terman, Christopher J. |
| author_facet | Terman, Christopher J. Marantz, Joshua David |
| author_sort | Marantz, Joshua David |
| collection | MIT |
| description | In the domain of computer science, particularly VLSI CAD, an increasing amount of engineering time is spent running compute-bound programs. Many of these programs have an intrinsic parallelism that is externally accessible. This thesis describes a novel software system that uses a small number of independent computers connected by a network to exploit the parallelism inherent in existing software, and thereby, reduce its running time. |
| first_indexed | 2024-09-23T12:38:00Z |
| id | mit-1721.1/149631 |
| institution | Massachusetts Institute of Technology |
| last_indexed | 2024-09-23T12:38:00Z |
| publishDate | 2023 |
| record_format | dspace |
| spelling | mit-1721.1/1496312023-03-30T03:44:22Z Exploiting Parallelism in VLSI CAD Marantz, Joshua David Terman, Christopher J. In the domain of computer science, particularly VLSI CAD, an increasing amount of engineering time is spent running compute-bound programs. Many of these programs have an intrinsic parallelism that is externally accessible. This thesis describes a novel software system that uses a small number of independent computers connected by a network to exploit the parallelism inherent in existing software, and thereby, reduce its running time. 2023-03-29T15:13:28Z 2023-03-29T15:13:28Z 1986-01 https://hdl.handle.net/1721.1/149631 16953403 MIT-LCS-TR-363 application/pdf |
| spellingShingle | Marantz, Joshua David Exploiting Parallelism in VLSI CAD |
| title | Exploiting Parallelism in VLSI CAD |
| title_full | Exploiting Parallelism in VLSI CAD |
| title_fullStr | Exploiting Parallelism in VLSI CAD |
| title_full_unstemmed | Exploiting Parallelism in VLSI CAD |
| title_short | Exploiting Parallelism in VLSI CAD |
| title_sort | exploiting parallelism in vlsi cad |
| url | https://hdl.handle.net/1721.1/149631 |
| work_keys_str_mv | AT marantzjoshuadavid exploitingparallelisminvlsicad |