The Clock Distribution Systems of the Multiprocessor Emulation Facility
Consisting of 32 high-speed processors, the multiple processor emulation facility communicates data between its processors through the use of synchronous, high-bandwidth packet switches residing on the ports of every processor. Because of the synchronous nature of these packet switches, there was a...
| المؤلف الرئيسي: | |
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| مؤلفون آخرون: | |
| منشور في: |
2023
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| الوصول للمادة أونلاين: | https://hdl.handle.net/1721.1/149634 |
| _version_ | 1826199775740952576 |
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| author | Younis, Saed G. |
| author2 | Arvind |
| author_facet | Arvind Younis, Saed G. |
| author_sort | Younis, Saed G. |
| collection | MIT |
| description | Consisting of 32 high-speed processors, the multiple processor emulation facility communicates data between its processors through the use of synchronous, high-bandwidth packet switches residing on the ports of every processor. Because of the synchronous nature of these packet switches, there was a need to design a clock distribution system that can distribute a clock signal to the 32 ports with as little clock skew as possible. |
| first_indexed | 2024-09-23T11:25:35Z |
| id | mit-1721.1/149634 |
| institution | Massachusetts Institute of Technology |
| last_indexed | 2024-09-23T11:25:35Z |
| publishDate | 2023 |
| record_format | dspace |
| spelling | mit-1721.1/1496342023-03-30T03:53:09Z The Clock Distribution Systems of the Multiprocessor Emulation Facility Younis, Saed G. Arvind Consisting of 32 high-speed processors, the multiple processor emulation facility communicates data between its processors through the use of synchronous, high-bandwidth packet switches residing on the ports of every processor. Because of the synchronous nature of these packet switches, there was a need to design a clock distribution system that can distribute a clock signal to the 32 ports with as little clock skew as possible. 2023-03-29T15:13:38Z 2023-03-29T15:13:38Z 1986-06 https://hdl.handle.net/1721.1/149634 16963238 MIT-LCS-TR-366 application/pdf |
| spellingShingle | Younis, Saed G. The Clock Distribution Systems of the Multiprocessor Emulation Facility |
| title | The Clock Distribution Systems of the Multiprocessor Emulation Facility |
| title_full | The Clock Distribution Systems of the Multiprocessor Emulation Facility |
| title_fullStr | The Clock Distribution Systems of the Multiprocessor Emulation Facility |
| title_full_unstemmed | The Clock Distribution Systems of the Multiprocessor Emulation Facility |
| title_short | The Clock Distribution Systems of the Multiprocessor Emulation Facility |
| title_sort | clock distribution systems of the multiprocessor emulation facility |
| url | https://hdl.handle.net/1721.1/149634 |
| work_keys_str_mv | AT younissaedg theclockdistributionsystemsofthemultiprocessoremulationfacility AT younissaedg clockdistributionsystemsofthemultiprocessoremulationfacility |