Design and Implementation of a Packet Switched Routing Chip
Monsoon is a parallel processing dataflow computer that will require a high bandwidth interconnection network. A packet switched routing chip (PaRC) is described that will be used as the basis of this network. PaRC is a 4 by 4 routing switch which has been designed and fabricated as a CMOS gate ar...
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| Published: |
2023
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| Online Access: | https://hdl.handle.net/1721.1/149693 |
| _version_ | 1826190800154787840 |
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| author | Joerg, Christopher Frank |
| author_facet | Joerg, Christopher Frank |
| author_sort | Joerg, Christopher Frank |
| collection | MIT |
| description | Monsoon is a parallel processing dataflow computer that will require a high bandwidth interconnection network. A packet switched routing chip (PaRC) is described that will be used as the basis of this network. PaRC is a 4 by 4 routing switch which has been designed and fabricated as a CMOS gate array. |
| first_indexed | 2024-09-23T08:45:52Z |
| id | mit-1721.1/149693 |
| institution | Massachusetts Institute of Technology |
| last_indexed | 2024-09-23T08:45:52Z |
| publishDate | 2023 |
| record_format | dspace |
| spelling | mit-1721.1/1496932023-03-30T04:18:13Z Design and Implementation of a Packet Switched Routing Chip Joerg, Christopher Frank Monsoon is a parallel processing dataflow computer that will require a high bandwidth interconnection network. A packet switched routing chip (PaRC) is described that will be used as the basis of this network. PaRC is a 4 by 4 routing switch which has been designed and fabricated as a CMOS gate array. 2023-03-29T15:16:58Z 2023-03-29T15:16:58Z 1990-12 https://hdl.handle.net/1721.1/149693 23126764 MIT-LCS-TR-482 application/pdf |
| spellingShingle | Joerg, Christopher Frank Design and Implementation of a Packet Switched Routing Chip |
| title | Design and Implementation of a Packet Switched Routing Chip |
| title_full | Design and Implementation of a Packet Switched Routing Chip |
| title_fullStr | Design and Implementation of a Packet Switched Routing Chip |
| title_full_unstemmed | Design and Implementation of a Packet Switched Routing Chip |
| title_short | Design and Implementation of a Packet Switched Routing Chip |
| title_sort | design and implementation of a packet switched routing chip |
| url | https://hdl.handle.net/1721.1/149693 |
| work_keys_str_mv | AT joergchristopherfrank designandimplementationofapacketswitchedroutingchip |