A High-performance Retargetable Simulator for Parallel Architectures

The complexity of the interaction between software and hardware in MIMD machines makes experimental evaluation of parallel programs an import complement to theoretical analysis. Traditional techniques used to monitor the direct execution of programs are intrusive an d may lead to inaccurate results...

Full description

Bibliographic Details
Main Author: Dellarocas, Chrysanthos N.
Other Authors: Weihl, William E.
Published: 2023
Online Access:https://hdl.handle.net/1721.1/149707
_version_ 1826210501202280448
author Dellarocas, Chrysanthos N.
author2 Weihl, William E.
author_facet Weihl, William E.
Dellarocas, Chrysanthos N.
author_sort Dellarocas, Chrysanthos N.
collection MIT
description The complexity of the interaction between software and hardware in MIMD machines makes experimental evaluation of parallel programs an import complement to theoretical analysis. Traditional techniques used to monitor the direct execution of programs are intrusive an d may lead to inaccurate results when applied to parallel programs.
first_indexed 2024-09-23T14:50:58Z
id mit-1721.1/149707
institution Massachusetts Institute of Technology
last_indexed 2024-09-23T14:50:58Z
publishDate 2023
record_format dspace
spelling mit-1721.1/1497072023-03-30T03:21:25Z A High-performance Retargetable Simulator for Parallel Architectures Dellarocas, Chrysanthos N. Weihl, William E. The complexity of the interaction between software and hardware in MIMD machines makes experimental evaluation of parallel programs an import complement to theoretical analysis. Traditional techniques used to monitor the direct execution of programs are intrusive an d may lead to inaccurate results when applied to parallel programs. 2023-03-29T15:17:53Z 2023-03-29T15:17:53Z 1991-06 https://hdl.handle.net/1721.1/149707 24063280 MIT-LCS-TR-505 application/pdf
spellingShingle Dellarocas, Chrysanthos N.
A High-performance Retargetable Simulator for Parallel Architectures
title A High-performance Retargetable Simulator for Parallel Architectures
title_full A High-performance Retargetable Simulator for Parallel Architectures
title_fullStr A High-performance Retargetable Simulator for Parallel Architectures
title_full_unstemmed A High-performance Retargetable Simulator for Parallel Architectures
title_short A High-performance Retargetable Simulator for Parallel Architectures
title_sort high performance retargetable simulator for parallel architectures
url https://hdl.handle.net/1721.1/149707
work_keys_str_mv AT dellarocaschrysanthosn ahighperformanceretargetablesimulatorforparallelarchitectures
AT dellarocaschrysanthosn highperformanceretargetablesimulatorforparallelarchitectures