RAELLA: Reforming the Arithmetic for Efficient, Low-Resolution, and Low-Loss Analog PIM: No Retraining Required!

RAELLA: Reforming the Arithmetic for Efficient, Low-Resolution, and Low-Loss Analog PIM: No Retraining Required!

Bibliographic Details
Main Authors:	Andrulis, Tanner, Emer, Joel, Sze, Vivienne
Other Authors:	Massachusetts Institute of Technology. Research Laboratory of Electronics
Format:	Article
Language:	English
Published:	ACM\|Proceedings of the 50th Annual International Symposium on Computer Architecture 2023
Online Access:	https://hdl.handle.net/1721.1/151101

Similar Items

Efficient, Accurate, and Flexible PIM Inference through Adaptable Low-Resolution Arithmetic
by: Andrulis, Tanner
Published: (2023)

Essays on job search and retraining
by: Ben Dhia, Aicha(Aicha Lucie)
Published: (2021)

Low power CMOS and adiabatic arithmetic units
by: Meng, Xing
Published: (2015)

Design of Low Power Arithmetic Logic Unit
by: Senthilvel, Vignesh
Published: (2019)

Low power and high performance arithmetic circuit
by: Hua, Ziyun.
Published: (2009)

Requirements for a product information management (PIM) infrastructure to support partner programs
by: Vedapudi, Manu, 1962-
Published: (2014)

CMOS low power circuits for approximate computer arithmetic
by: Zhang, Han
Published: (2013)

Low power CMOS circuits with approximate computer arithmetic
by: Cheng, Suoyu
Published: (2016)

32-bit low-delay arithmetic-logic unit
by: Mu, Yihao
Published: (2022)

Low power performance analysis of CMOS arithmetic units
by: Moni, Bhaskar
Published: (2016)

Low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications
by: Gu, Jiangmin
Published: (2008)

A low power and fast CMOS arithmetic logic unit
by: Zulkifli, Nur Umaira
Published: (2015)

Basic logic circuits and arithmetic subsystems for low-power applications
by: Law, Chong Fatt.
Published: (2008)

Parallel algorithms and architectures for low power video decoding
by: Sze, Vivienne
Published: (2011)

Retraining SNN conversions: CNN to SNN for audio classification tasks
by: Chang, John Rong Qi
Published: (2023)

Physiotherapy breathing retraining for asthma: a randomised controlled trial.
by: Bruton, A, et al.
Published: (2017)

PIM : Perpustakaan Inti Masyarakat
by: Perpustakaan UGM, i-lib
Published: (2003)

An Architecture-Level Energy and Area Estimator for Processing-In-Memory Accelerator Designs
by: Wu, Yannan Nellie, et al.
Published: (2021)

Using Dataflow to Optimize Energy Efficiency of Deep Neural Network Accelerators
by: Chen, Yu-Hsin, et al.
Published: (2021)

Accelergy: An Architecture-Level Energy Estimation Methodology for Accelerator Designs
by: Wu, Yannan Nellie, et al.
Published: (2019)

Eyeriss: A Spatial Architecture for Energy-Efficient Dataflow for Convolutional Neural Networks
by: Chen, Yu-Hsin, et al.
Published: (2016)

Last Layer Retraining of Selectively Sampled Wild Data Improves Performance
by: Yang, Hao Bang
Published: (2023)

Ultra low-voltage low-power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits
by: Chang, Chip Hong, et al.
Published: (2009)

Product information and management systems (PIMS)
by: Nagesh, K. N.
Published: (2008)

32-bit low power-delay-product arithmetic-logic unit design
by: Ren, Jialu
Published: (2022)

Low power, low area, monolithic oversampling digital to analog conversion
by: Keehr, Edward A. (Edward Arthur), 1979-
Published: (2014)

Effect of exercise and gait retraining on knee adduction moment in people with knee osteoarthritis
by: Khalaj, N., et al.
Published: (2014)

The retraining programs : a response to the employment crisis in the West German coal industry
by: Lindsay, Catherine Coffin.
Published: (2009)

Low Power Depth Estimation of Rigid Objects for Time-of-Flight Imaging
by: Noraky, James, et al.
Published: (2021)

Ultra-low power 8-bit CMOS adder design based on approximate arithmetic
by: Hu, Zhengyu
Published: (2019)

Low power design techniques for analog circuit
by: Zainudin, Faez Hazwan
Published: (2017)

Design of the low-voltage CMOS analog multiplier
by: Chong, Hauo Wah.
Published: (2010)

Design of the low-voltage CMOS analog multiplier
by: Sun, Guoliang.
Published: (2008)

Design of the low-voltage CMOS analog multiplier
by: Tan, Wai Kit.
Published: (2013)

Design of the low-voltage CMOS analog multiplier
by: Guo, Lizao.
Published: (2012)

Data envelopment analysis: Introduction & PIM software
by: Emrouznejad, Ali
Published: (2014)

Structure and substrate specificity of the Pim-1 kinase
by: Bullock, A, et al.
Published: (2005)

Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks
by: Chen, Yu-Hsin, et al.
Published: (2016)

Tailors: Accelerating Sparse Tensor Algebra by Overbooking Buffer Capacity
by: Xue, Zi Yu, et al.
Published: (2024)

Evaluasi kinerja Badan Diklat Departemen Dalam Negeri :: Studi kasus pelaksanaan Diklat PIM III dan PIM IV
by: , SETIYONO, et al.
Published: (2005)