Tardigrade: A Hardware Accelerator for Sparse Matrix Multiplication and Sparse Convolution
Sparse matrix-sparse matrix multiplication (SpMSpM) and sparse convolution are critical primitive operations for scientific computing and deep learning. Prior work has proposed accelerators for each of these primitives, but these systems are often specialized to run either SpMSpM or sparse convoluti...
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| Other Authors: | |
| Format: | Thesis |
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Massachusetts Institute of Technology
2023
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| Online Access: | https://hdl.handle.net/1721.1/151316 |
| _version_ | 1826198659988979712 |
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| author | Attaluri, Nithya |
| author2 | Sanchez, Daniel |
| author_facet | Sanchez, Daniel Attaluri, Nithya |
| author_sort | Attaluri, Nithya |
| collection | MIT |
| description | Sparse matrix-sparse matrix multiplication (SpMSpM) and sparse convolution are critical primitive operations for scientific computing and deep learning. Prior work has proposed accelerators for each of these primitives, but these systems are often specialized to run either SpMSpM or sparse convolution efficiently. Although there are methods to run sparse convolution on an SpMSpM accelerator, and vice versa, this typically incurs unnecessary space overheads, higher memory traffic, or reduced performance. Ideally, a single hardware accelerator should provide native support for both operations. This work addresses this challenge through Tardigrade, a hardware accelerator for both SpMSpM and sparse convolution. Tardigrade extends the design of Gamma, a recent hardware accelerator for SpMSpM, to accelerate sparse convolution while retaining its SpMSpM capabilities. We compare Tardigrade’s performance against that of Gamma and recent accelerators for sparse convolutional neural networks (CNNs). Tardigrade shows comparable performance on SpMSpM and achieves a gmean 3.1× improvement in speed on sparse convolution. |
| first_indexed | 2024-09-23T11:08:13Z |
| format | Thesis |
| id | mit-1721.1/151316 |
| institution | Massachusetts Institute of Technology |
| last_indexed | 2024-09-23T11:08:13Z |
| publishDate | 2023 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/1513162023-08-01T03:57:17Z Tardigrade: A Hardware Accelerator for Sparse Matrix Multiplication and Sparse Convolution Attaluri, Nithya Sanchez, Daniel Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Sparse matrix-sparse matrix multiplication (SpMSpM) and sparse convolution are critical primitive operations for scientific computing and deep learning. Prior work has proposed accelerators for each of these primitives, but these systems are often specialized to run either SpMSpM or sparse convolution efficiently. Although there are methods to run sparse convolution on an SpMSpM accelerator, and vice versa, this typically incurs unnecessary space overheads, higher memory traffic, or reduced performance. Ideally, a single hardware accelerator should provide native support for both operations. This work addresses this challenge through Tardigrade, a hardware accelerator for both SpMSpM and sparse convolution. Tardigrade extends the design of Gamma, a recent hardware accelerator for SpMSpM, to accelerate sparse convolution while retaining its SpMSpM capabilities. We compare Tardigrade’s performance against that of Gamma and recent accelerators for sparse convolutional neural networks (CNNs). Tardigrade shows comparable performance on SpMSpM and achieves a gmean 3.1× improvement in speed on sparse convolution. M.Eng. 2023-07-31T19:30:51Z 2023-07-31T19:30:51Z 2023-06 2023-06-06T16:34:36.150Z Thesis https://hdl.handle.net/1721.1/151316 In Copyright - Educational Use Permitted Copyright retained by author(s) https://rightsstatements.org/page/InC-EDU/1.0/ application/pdf Massachusetts Institute of Technology |
| spellingShingle | Attaluri, Nithya Tardigrade: A Hardware Accelerator for Sparse Matrix Multiplication and Sparse Convolution |
| title | Tardigrade: A Hardware Accelerator for Sparse Matrix Multiplication and Sparse Convolution |
| title_full | Tardigrade: A Hardware Accelerator for Sparse Matrix Multiplication and Sparse Convolution |
| title_fullStr | Tardigrade: A Hardware Accelerator for Sparse Matrix Multiplication and Sparse Convolution |
| title_full_unstemmed | Tardigrade: A Hardware Accelerator for Sparse Matrix Multiplication and Sparse Convolution |
| title_short | Tardigrade: A Hardware Accelerator for Sparse Matrix Multiplication and Sparse Convolution |
| title_sort | tardigrade a hardware accelerator for sparse matrix multiplication and sparse convolution |
| url | https://hdl.handle.net/1721.1/151316 |
| work_keys_str_mv | AT attalurinithya tardigradeahardwareacceleratorforsparsematrixmultiplicationandsparseconvolution |