Microarchitecture Categorization and Pre-RTL Analytical Modeling for Sparse Tensor Accelerators
Specialized microarchitectures for exploiting sparsity have been critical to the design of sparse tensor accelerators. Sparseloop introduced the Sparse Acceleration Feature (SAF) abstraction, which unifies prior work on sparse tensor accelerators into a taxonomy of sparsity optimizations. Spars...
Main Author: | Feldman, Andrew |
---|---|
Other Authors: | Sze, Vivienne |
Format: | Thesis |
Published: |
Massachusetts Institute of Technology
2024
|
Online Access: | https://hdl.handle.net/1721.1/153859 |
Similar Items
-
Accelerating RTL Simulation with Hardware-Software Co-Design
by: Elsabbagh, Fares, et al.
Published: (2024) -
TeAAL: A Declarative Framework for Modeling Sparse Tensor Accelerators
by: Nayak, Nandeeka, et al.
Published: (2024) -
Tailors: Accelerating Sparse Tensor Algebra by Overbooking Buffer Capacity
by: Xue, Zi Yu, et al.
Published: (2024) -
Tailors: Accelerating Sparse Tensor Algebra by Overbooking Buffer Capacity
by: Xue, Zi Yu
Published: (2024) -
Categorical Tensor Network States
by: Biamonte, S, et al.
Published: (2010)