Verifying Hardware Security Modules With True Random NumberGenerators
Hardware security modules (HSMs) are powerful tools in building secure computer systems, allowing developers to factor out security-critical code to separate devices. Because HSMs usually work with sensitive data, it is crucial that we are able to verify that they are secure. Many HSMs today also in...
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| Format: | Thesis |
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Massachusetts Institute of Technology
2024
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| Online Access: | https://hdl.handle.net/1721.1/156746 |
| _version_ | 1826193905819844608 |
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| author | Zhao, Katherine |
| author2 | Zeldovich, Nickolai |
| author_facet | Zeldovich, Nickolai Zhao, Katherine |
| author_sort | Zhao, Katherine |
| collection | MIT |
| description | Hardware security modules (HSMs) are powerful tools in building secure computer systems, allowing developers to factor out security-critical code to separate devices. Because HSMs usually work with sensitive data, it is crucial that we are able to verify that they are secure. Many HSMs today also include true random number generators (TRNGs) as part of their architecture to seed cryptographic functions for generating keys, creating nonces, padding, and more. This thesis presents a definition of Information-Preserving Refinement with Randomness (IPRR) that captures the idea that a HSM with a TRNG is correct and is secure from timing side channel attacks. We additionally construct a strategy to prove IPRR, and develop Karatroc, a tool for verifying that a HSM satisfies IPRR. Through the creation and evaluation of Karatroc, we demonstrate the ability to verify HSMs with TRNGs without incurring significant added cost in performance and proof length as compared to existing proof methods. |
| first_indexed | 2024-09-23T09:47:10Z |
| format | Thesis |
| id | mit-1721.1/156746 |
| institution | Massachusetts Institute of Technology |
| last_indexed | 2024-09-23T09:47:10Z |
| publishDate | 2024 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/1567462024-09-17T03:54:11Z Verifying Hardware Security Modules With True Random NumberGenerators Zhao, Katherine Zeldovich, Nickolai Athalye, Anish Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Hardware security modules (HSMs) are powerful tools in building secure computer systems, allowing developers to factor out security-critical code to separate devices. Because HSMs usually work with sensitive data, it is crucial that we are able to verify that they are secure. Many HSMs today also include true random number generators (TRNGs) as part of their architecture to seed cryptographic functions for generating keys, creating nonces, padding, and more. This thesis presents a definition of Information-Preserving Refinement with Randomness (IPRR) that captures the idea that a HSM with a TRNG is correct and is secure from timing side channel attacks. We additionally construct a strategy to prove IPRR, and develop Karatroc, a tool for verifying that a HSM satisfies IPRR. Through the creation and evaluation of Karatroc, we demonstrate the ability to verify HSMs with TRNGs without incurring significant added cost in performance and proof length as compared to existing proof methods. M.Eng. 2024-09-16T13:46:36Z 2024-09-16T13:46:36Z 2024-05 2024-07-11T14:36:53.891Z Thesis https://hdl.handle.net/1721.1/156746 In Copyright - Educational Use Permitted Copyright retained by author(s) https://rightsstatements.org/page/InC-EDU/1.0/ application/pdf Massachusetts Institute of Technology |
| spellingShingle | Zhao, Katherine Verifying Hardware Security Modules With True Random NumberGenerators |
| title | Verifying Hardware Security Modules With True Random NumberGenerators |
| title_full | Verifying Hardware Security Modules With True Random NumberGenerators |
| title_fullStr | Verifying Hardware Security Modules With True Random NumberGenerators |
| title_full_unstemmed | Verifying Hardware Security Modules With True Random NumberGenerators |
| title_short | Verifying Hardware Security Modules With True Random NumberGenerators |
| title_sort | verifying hardware security modules with true random numbergenerators |
| url | https://hdl.handle.net/1721.1/156746 |
| work_keys_str_mv | AT zhaokatherine verifyinghardwaresecuritymoduleswithtruerandomnumbergenerators |