A placement/interconnect channel router : cutting your PI into slices

Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1981.

Bibliographic Details
Main Author: Koschella, James Joseph
Other Authors: Ronald L. Rivest.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2005
Subjects:
Online Access:http://hdl.handle.net/1721.1/15713
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author Koschella, James Joseph
author2 Ronald L. Rivest.
author_facet Ronald L. Rivest.
Koschella, James Joseph
author_sort Koschella, James Joseph
collection MIT
description Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1981.
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spelling mit-1721.1/157132019-04-12T12:44:10Z A placement/interconnect channel router : cutting your PI into slices Koschella, James Joseph Ronald L. Rivest. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Integrated circuits Very large scale integration Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1981. MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. by James Joseph Koschella. B.S. 2005-08-04T18:54:47Z 2005-08-04T18:54:47Z 1981 Thesis http://hdl.handle.net/1721.1/15713 09120771 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 44 leaves 2934333 bytes 2934091 bytes application/pdf application/pdf application/pdf Massachusetts Institute of Technology
spellingShingle Electrical Engineering and Computer Science.
Integrated circuits Very large scale integration
Koschella, James Joseph
A placement/interconnect channel router : cutting your PI into slices
title A placement/interconnect channel router : cutting your PI into slices
title_full A placement/interconnect channel router : cutting your PI into slices
title_fullStr A placement/interconnect channel router : cutting your PI into slices
title_full_unstemmed A placement/interconnect channel router : cutting your PI into slices
title_short A placement/interconnect channel router : cutting your PI into slices
title_sort placement interconnect channel router cutting your pi into slices
topic Electrical Engineering and Computer Science.
Integrated circuits Very large scale integration
url http://hdl.handle.net/1721.1/15713
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