Rapid designs for cache coherence protocol engines in Bluespec
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005.
Main Author: | |
---|---|
Other Authors: | |
Format: | Thesis |
Language: | eng |
Published: |
Massachusetts Institute of Technology
2006
|
Subjects: | |
Online Access: | http://hdl.handle.net/1721.1/30166 |
_version_ | 1826214230670442496 |
---|---|
author | Ng, Man Cheuk, 1980- |
author2 | Arvind. |
author_facet | Arvind. Ng, Man Cheuk, 1980- |
author_sort | Ng, Man Cheuk, 1980- |
collection | MIT |
description | Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005. |
first_indexed | 2024-09-23T16:01:53Z |
format | Thesis |
id | mit-1721.1/30166 |
institution | Massachusetts Institute of Technology |
language | eng |
last_indexed | 2024-09-23T16:01:53Z |
publishDate | 2006 |
publisher | Massachusetts Institute of Technology |
record_format | dspace |
spelling | mit-1721.1/301662019-04-12T16:03:30Z Rapid designs for cache coherence protocol engines in Bluespec Ng, Man Cheuk, 1980- Arvind. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005. Includes bibliographical references (p. 91-92). In this thesis, we present the framework for Rapid Protocol Engine Development (RaPED). We implemented the framework in Bluespec, which is a high level hardware language based on Term Rewriting Systems (TRSs). The framework is highly parameterized and general, thus allowing designers to design any protocol engine in a short period. Since protocol engines can be developed rapidly, designers can compare different designs instead of freezing the design prematurely in the development process. We used the RaPED to implement a cache coherence protocol for Shen and Arvind's Commit-Reconcile and Fences (CRF) memory model [1]. The CRF allows scalable implementations of shared memory systems by decomposing memory access operations into simpler instructions. However, the focus for Shen's Cachet protocol for the CRF was adaptivity and correctness, it ignored some important implementation issues such as cache-line replacement, efficient buffer management and compatibility with multiword cache lines. In this thesis, we present a protocol called the Multiword Base protocol, which avoids these limitations. We defined the Multi-word CRF (MCRF) memory model to help us to prove the correctness of Multiword Base. The MCRF is a specialization of the CRF with modifications that summarizes the properties of multiword cache lines. We show that Multiword Base is a correct implementation of the CRF by using the MCRF to simulate Multiword Base. Apart from using multiword cache lines, many cache coherence protocols allow a cache to get data directly from another cache. The caches having this property is calling the snoopy caches. In this thesis, we present a CRF variant called the Snoopy CRF (SCRF) memory model, which gives hints to incorporate snoopy caches to the implementations of the CRF. by Man Cheuk Ng. S.M. 2006-03-24T18:25:46Z 2006-03-24T18:25:46Z 2005 2005 Thesis http://hdl.handle.net/1721.1/30166 60677934 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 92 p. 5015030 bytes 5025518 bytes application/pdf application/pdf application/pdf Massachusetts Institute of Technology |
spellingShingle | Electrical Engineering and Computer Science. Ng, Man Cheuk, 1980- Rapid designs for cache coherence protocol engines in Bluespec |
title | Rapid designs for cache coherence protocol engines in Bluespec |
title_full | Rapid designs for cache coherence protocol engines in Bluespec |
title_fullStr | Rapid designs for cache coherence protocol engines in Bluespec |
title_full_unstemmed | Rapid designs for cache coherence protocol engines in Bluespec |
title_short | Rapid designs for cache coherence protocol engines in Bluespec |
title_sort | rapid designs for cache coherence protocol engines in bluespec |
topic | Electrical Engineering and Computer Science. |
url | http://hdl.handle.net/1721.1/30166 |
work_keys_str_mv | AT ngmancheuk1980 rapiddesignsforcachecoherenceprotocolenginesinbluespec |