A general-purpose pulse sequencer for quantum computing

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005.

Bibliographic Details
Main Author: Phạm, Paul Tân Thế
Other Authors: Isaac L. Chuang.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2006
Subjects:
Online Access:http://hdl.handle.net/1721.1/32106
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author Phạm, Paul Tân Thế
author2 Isaac L. Chuang.
author_facet Isaac L. Chuang.
Phạm, Paul Tân Thế
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description Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005.
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spelling mit-1721.1/321062022-01-13T07:54:29Z A general-purpose pulse sequencer for quantum computing Phạm, Paul Tân Thế Isaac L. Chuang. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Electrical Engineering and Computer Science. Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005. This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. Includes bibliographical references (p. 165-170). Quantum mechanics presents a more general and potentially more powerful model of computation than classical systems. Quantum bits have many physically different representations which nonetheless share a common need for modulating pulses of electromagnetic waves. This thesis presents the design and evaluates the implementation of a general-purpose sequencer which supports fast, programmable pulses; a flexible, open design; and feedback operation for adaptive algorithms. The sequencer achieves a timing resolution, minimum pulse duration, and minimum delay of 10 nanoseconds; it has 64 simultaneously-switching, independent digital outputs and 8 digital inputs for triggering or feedback. Multiple devices can operate in a daisy chain to facilitate adding and removing channels. An FPGA is used to implement a firmware network stack and a specialized pulse processor core whose modules are all interconnected using the Wishbone bus standard. Users can write pulse programs in an assembly language and control the device from a host computer over an Ethernet network. An embedded web server provides an intuitive, graphical user interface, while a non-interactive, efficient UDP protocol provides programmatic access to third-party software. The performance characteristics, tolerances, and cost of the device are measured and compared with those of contemporary research and commercial offerings. Future improvements and extensions are suggested. All circuit schematics, PCB layouts, source code, and design documents are released under an open source license. by Paul Tân Thế Phạm. M.Eng. 2006-03-28T19:51:51Z 2006-03-28T19:51:51Z 2005 2005 Thesis http://hdl.handle.net/1721.1/32106 62367587 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 170 p. 1906024 bytes 1903939 bytes application/pdf application/pdf application/pdf Massachusetts Institute of Technology
spellingShingle Electrical Engineering and Computer Science.
Phạm, Paul Tân Thế
A general-purpose pulse sequencer for quantum computing
title A general-purpose pulse sequencer for quantum computing
title_full A general-purpose pulse sequencer for quantum computing
title_fullStr A general-purpose pulse sequencer for quantum computing
title_full_unstemmed A general-purpose pulse sequencer for quantum computing
title_short A general-purpose pulse sequencer for quantum computing
title_sort general purpose pulse sequencer for quantum computing
topic Electrical Engineering and Computer Science.
url http://hdl.handle.net/1721.1/32106
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