An architecture study of a Byzantine-resilient processor using authentication

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.

Bibliographic Details
Main Author: Clark, Anne L. (Anne Lauren)
Other Authors: Stephen A. Ward and Richard E. Harper.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2006
Subjects:
Online Access:http://hdl.handle.net/1721.1/34101
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author Clark, Anne L. (Anne Lauren)
author2 Stephen A. Ward and Richard E. Harper.
author_facet Stephen A. Ward and Richard E. Harper.
Clark, Anne L. (Anne Lauren)
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description Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.
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spelling mit-1721.1/341012019-04-10T13:59:33Z An architecture study of a Byzantine-resilient processor using authentication Clark, Anne L. (Anne Lauren) Stephen A. Ward and Richard E. Harper. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994. Includes bibliographical references (p. 121-123). This architecture study provides the ground work for implementing a new generation of Byzantine resilient processors using authentication. The use of authentication allows a significant reduction in the theoretical requirements necessary for providing Byzantine resilience, or the ability to continue correct operation in the presence of arbitrary or even malicious faults. This decrease in requirements led to a goal of providing a system which combines the stringent standards embodied by Byzantine resilience with the lower costs necessary to make the system viable for more markets than previous Byzantine resilient processors. A layering scheme is proposed which can be placed between the user and hardware. These layers consist of protocols which provide the basic building blocks of the architecture. The proposed authentication protocol which provides the digital signatures used to verify the origin and contents of messages is a public-key protocol using 32-bit Cyclic Redundancy Codes (CRC's) to encode the message with 32-bit modular inverse key pairs to sign and authenticate the CRC. An interactive consistency protocol responsible for correctly distributing single-source data between processors is built using the SM(m) algorithm from [LSP82] with improvements suggested in [Dol83]. A voting protocol responsible for generating a group consensus value guaranteed to be the same on all nonfaulty processors suggests exchanging unsigned messages and then using a full-set majority vote choice() function to calculate the group consensus value. Finally, the proposed synchronization protocol needed to provide synchronized virtual clocks on all nonfaulty processors is placed on top of a full message exchange (FME) known as a From_all exchange to read the clocks on other processors. A time adjustment is then calculated using a technique suggested in [LM84]. by Anne L. Clark. M.S. 2006-09-28T15:02:43Z 2006-09-28T15:02:43Z 1994 1994 Thesis http://hdl.handle.net/1721.1/34101 46988292 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 123 p. 7585284 bytes 7590392 bytes application/pdf application/pdf application/pdf Massachusetts Institute of Technology
spellingShingle Electrical Engineering and Computer Science.
Clark, Anne L. (Anne Lauren)
An architecture study of a Byzantine-resilient processor using authentication
title An architecture study of a Byzantine-resilient processor using authentication
title_full An architecture study of a Byzantine-resilient processor using authentication
title_fullStr An architecture study of a Byzantine-resilient processor using authentication
title_full_unstemmed An architecture study of a Byzantine-resilient processor using authentication
title_short An architecture study of a Byzantine-resilient processor using authentication
title_sort architecture study of a byzantine resilient processor using authentication
topic Electrical Engineering and Computer Science.
url http://hdl.handle.net/1721.1/34101
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