A performance driven approach for hardware synthesis of guarded atomic actions
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2006
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| Online Access: | http://hdl.handle.net/1721.1/34473 |
| _version_ | 1811086007392534528 |
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| author | Rosenband, Daniel L., 1977- |
| author2 | Arvind. |
| author_facet | Arvind. Rosenband, Daniel L., 1977- |
| author_sort | Rosenband, Daniel L., 1977- |
| collection | MIT |
| description | Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005. |
| first_indexed | 2024-09-23T13:19:25Z |
| format | Thesis |
| id | mit-1721.1/34473 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T13:19:25Z |
| publishDate | 2006 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/344732019-04-11T12:57:53Z A performance driven approach for hardware synthesis of guarded atomic actions Rosenband, Daniel L., 1977- Arvind. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005. Includes bibliographical references (p. 137-140). Hardware designers are facing new challenges in the design of complex ASIC's and processors as their sizes approach up to 100 million logic gates. We believe no adequate solution exists that allows designers to specify hardware which takes full advantage of the available resources in these devices. The hardware design specification languages are either too low level to support efficient large scale design (for example, Verilog), or the language and synthesis methodology is so high-level that the designer's micro-architectural ingenuity is lost in the design process. This results in circuits that oftentimes do not match the designer's expectations (for example, C-based behavioral synthesis). 'This thesis presents a design methodology and related synthesis algorithms that address several of the key issues of hardware design specification and high-level synthesis while avoiding the pitfalls of past approaches. The areas we focus on are modular compilation and performance specification. The modular flow allows for the separate compilation of modules and ensures the correct usage of module interfaces by attaching annotations with well defined semantics to them. We also introduce performance specifications as a core part of a design description. (cont.) This allows a designer to more easily achieve the expected design performance and it allows for rapid micro-architectural exploration. We chose guarded atomic actions as the foundation of this research because of their clean execution semantics. These semantics allow for easy design transformation (either manual or compiler driven) while ensuring that the correctness of the design is maintained. We demonstrate the practicality and power of this methodology using several examples, such as a processor which from a single design description can automatically be transformed into an unpipelined processor or a superscalar processor simply by changing a single-line performance specification. by Daniel L. Rosenband. Ph.D. 2006-11-07T12:25:52Z 2006-11-07T12:25:52Z 2005 2005 Thesis http://hdl.handle.net/1721.1/34473 70720638 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 140 p. 8027730 bytes 8033574 bytes application/pdf application/pdf application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Rosenband, Daniel L., 1977- A performance driven approach for hardware synthesis of guarded atomic actions |
| title | A performance driven approach for hardware synthesis of guarded atomic actions |
| title_full | A performance driven approach for hardware synthesis of guarded atomic actions |
| title_fullStr | A performance driven approach for hardware synthesis of guarded atomic actions |
| title_full_unstemmed | A performance driven approach for hardware synthesis of guarded atomic actions |
| title_short | A performance driven approach for hardware synthesis of guarded atomic actions |
| title_sort | performance driven approach for hardware synthesis of guarded atomic actions |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/34473 |
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