Simulation of timed input/output automata

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.

Bibliographic Details
Main Author: Mavrommatis, Panayiotis P
Other Authors: Dilsun K. Kaynar and Nancy A. Lynch.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2007
Subjects:
Online Access:http://hdl.handle.net/1721.1/36395
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author Mavrommatis, Panayiotis P
author2 Dilsun K. Kaynar and Nancy A. Lynch.
author_facet Dilsun K. Kaynar and Nancy A. Lynch.
Mavrommatis, Panayiotis P
author_sort Mavrommatis, Panayiotis P
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description Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.
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spelling mit-1721.1/363952019-04-11T05:54:35Z Simulation of timed input/output automata Simulation of TIOA Mavrommatis, Panayiotis P Dilsun K. Kaynar and Nancy A. Lynch. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006. This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. Includes bibliographical references (p. 73-74). This Master of Engineering Thesis describes the design, implementation, and usage of the TIOA Simulator. The TIOA Simulator, along with the other components of the TIOA Toolset aims to provide a framework for developing dependable distributed systems. The project is based on the Timed Input/Output Automaton framework, and supports TIOA, a formal language for specifying timed I/O automata. Simulation of TIOA programs is useful in the process of testing the proposed system over a specific set of executions. During the execution the Simulator is able to test proposed invariants and validate a proposed simulation relation between the system's implementation and its specification. A step correspondence between the steps of the implementation and the specification drives the validation of the simulation relation. The identification and validation of the invariants and the simulation relation constitutes the first step towards a formal verification of the system's correctness. The proposed step correspondence can be used in a formal proof to show that the proposed relation is indeed a simulation relation. by Panayiotis P. Mavrommatis. M.Eng. 2007-03-09T18:54:53Z 2007-03-09T18:54:53Z 2006 2006 Thesis http://hdl.handle.net/1721.1/36395 80775580 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 74 p. application/pdf Massachusetts Institute of Technology
spellingShingle Electrical Engineering and Computer Science.
Mavrommatis, Panayiotis P
Simulation of timed input/output automata
title Simulation of timed input/output automata
title_full Simulation of timed input/output automata
title_fullStr Simulation of timed input/output automata
title_full_unstemmed Simulation of timed input/output automata
title_short Simulation of timed input/output automata
title_sort simulation of timed input output automata
topic Electrical Engineering and Computer Science.
url http://hdl.handle.net/1721.1/36395
work_keys_str_mv AT mavrommatispanayiotisp simulationoftimedinputoutputautomata
AT mavrommatispanayiotisp simulationoftioa