Translating timed I/O automata specifications for theorem proving in PVs
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Thesis |
| Language: | eng |
| Published: |
Massachusetts Institute of Technology
2007
|
| Subjects: | |
| Online Access: | http://hdl.handle.net/1721.1/36803 |
| _version_ | 1811087153207181312 |
|---|---|
| author | Lim, Hongping |
| author2 | Nancy A. Lynch. |
| author_facet | Nancy A. Lynch. Lim, Hongping |
| author_sort | Lim, Hongping |
| collection | MIT |
| description | Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006. |
| first_indexed | 2024-09-23T13:40:54Z |
| format | Thesis |
| id | mit-1721.1/36803 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T13:40:54Z |
| publishDate | 2007 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/368032019-04-11T05:54:54Z Translating timed I/O automata specifications for theorem proving in PVs Translating TIOA specifications for theorem proving in PVs Lim, Hongping Nancy A. Lynch. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006. Includes bibliographical references (leaves 68-70). The timed input/output automaton modeling framework is a mathematical framework for specification and analysis of systems that involve discrete and continuous evolution. In order to employ an interactive theorem prover in deducing properties of a timed input/output automaton, its state-transition based description has to be translated to the language of the theorem prover. This thesis describes a tool for translating from TIOA, the formal language for describing timed input/output automata, to the language of the Prototype Verification System (PVS)--a specification system with an integrated interactive theorem prover. We describe the translation scheme, discuss the design decisions, and briefly present case studies to illustrate the application of the translator in the verification process. by Hongping Lim. M.Eng. 2007-03-12T17:55:12Z 2007-03-12T17:55:12Z 2006 2006 Thesis http://hdl.handle.net/1721.1/36803 80764721 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 70 leaves application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Lim, Hongping Translating timed I/O automata specifications for theorem proving in PVs |
| title | Translating timed I/O automata specifications for theorem proving in PVs |
| title_full | Translating timed I/O automata specifications for theorem proving in PVs |
| title_fullStr | Translating timed I/O automata specifications for theorem proving in PVs |
| title_full_unstemmed | Translating timed I/O automata specifications for theorem proving in PVs |
| title_short | Translating timed I/O automata specifications for theorem proving in PVs |
| title_sort | translating timed i o automata specifications for theorem proving in pvs |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/36803 |
| work_keys_str_mv | AT limhongping translatingtimedioautomataspecificationsfortheoremprovinginpvs AT limhongping translatingtioaspecificationsfortheoremprovinginpvs |