Thread scheduling mechanisms for multiple-context parallel processors
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2007
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| Online Access: | http://hdl.handle.net/1721.1/36968 |
| _version_ | 1811086829638647808 |
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| author | Fiske, James Alexander Stuart |
| author2 | William J. Dally. |
| author_facet | William J. Dally. Fiske, James Alexander Stuart |
| author_sort | Fiske, James Alexander Stuart |
| collection | MIT |
| description | Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995. |
| first_indexed | 2024-09-23T13:35:20Z |
| format | Thesis |
| id | mit-1721.1/36968 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T13:35:20Z |
| publishDate | 2007 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/369682019-04-10T08:06:39Z Thread scheduling mechanisms for multiple-context parallel processors Fiske, James Alexander Stuart William J. Dally. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science Electrical Engineering and Computer Science Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995. Includes bibliographical references (p. 200-290). by James Alexander Stuart Fiske. Ph.D. 2007-04-03T16:56:55Z 2007-04-03T16:56:55Z 1995 1995 Thesis http://hdl.handle.net/1721.1/36968 33227013 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 209 p. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science Fiske, James Alexander Stuart Thread scheduling mechanisms for multiple-context parallel processors |
| title | Thread scheduling mechanisms for multiple-context parallel processors |
| title_full | Thread scheduling mechanisms for multiple-context parallel processors |
| title_fullStr | Thread scheduling mechanisms for multiple-context parallel processors |
| title_full_unstemmed | Thread scheduling mechanisms for multiple-context parallel processors |
| title_short | Thread scheduling mechanisms for multiple-context parallel processors |
| title_sort | thread scheduling mechanisms for multiple context parallel processors |
| topic | Electrical Engineering and Computer Science |
| url | http://hdl.handle.net/1721.1/36968 |
| work_keys_str_mv | AT fiskejamesalexanderstuart threadschedulingmechanismsformultiplecontextparallelprocessors |