An energy efficient sub-threshold baseband processor architecture for pulsed ultra-wideband communications

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.

Bibliographic Details
Main Author: Sze, Vivienne
Other Authors: Anantha P. Chandrakasan.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2007
Subjects:
Online Access:http://hdl.handle.net/1721.1/37943
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author Sze, Vivienne
author2 Anantha P. Chandrakasan.
author_facet Anantha P. Chandrakasan.
Sze, Vivienne
author_sort Sze, Vivienne
collection MIT
description Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.
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spelling mit-1721.1/379432019-04-10T09:33:46Z An energy efficient sub-threshold baseband processor architecture for pulsed ultra-wideband communications Sze, Vivienne Anantha P. Chandrakasan. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006. Includes bibliographical references (p. 79-83). Ultra-wideband (UWB) communications is currently being explored as a medium for high-data-rate last-meter wireless links. Accordingly, there has been much interest in integrating UWB radios onto battery-operated devices, creating a strong demand for energy efficient UWB systems. The objective of this work is to describe how operating the digital baseband processor in the sub-threshold region and increasing the degree of parallelism can translate into energy savings across the entire UWB receiver. While sub-threshold operation is traditionally used for low energy, low performance applications such as wrist-watches, this work examines how sub-threshold operation can be applied to low energy, high performance applications. Simulation results for a 100-Mbps UWB baseband processor using the digital logic cell library of a 90-nm process are presented. by Vivienne Sze. S.M. 2007-07-18T13:13:35Z 2007-07-18T13:13:35Z 2006 2006 Thesis http://hdl.handle.net/1721.1/37943 144571763 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 83 p. application/pdf Massachusetts Institute of Technology
spellingShingle Electrical Engineering and Computer Science.
Sze, Vivienne
An energy efficient sub-threshold baseband processor architecture for pulsed ultra-wideband communications
title An energy efficient sub-threshold baseband processor architecture for pulsed ultra-wideband communications
title_full An energy efficient sub-threshold baseband processor architecture for pulsed ultra-wideband communications
title_fullStr An energy efficient sub-threshold baseband processor architecture for pulsed ultra-wideband communications
title_full_unstemmed An energy efficient sub-threshold baseband processor architecture for pulsed ultra-wideband communications
title_short An energy efficient sub-threshold baseband processor architecture for pulsed ultra-wideband communications
title_sort energy efficient sub threshold baseband processor architecture for pulsed ultra wideband communications
topic Electrical Engineering and Computer Science.
url http://hdl.handle.net/1721.1/37943
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