Implementing compiler optimizations using parallel graph reduction
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2007
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| Online Access: | http://hdl.handle.net/1721.1/38046 |
| _version_ | 1826214814064574464 |
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| author | Kulik, Joanna L. (Joanna Lynn) |
| author2 | Arvind. |
| author_facet | Arvind. Kulik, Joanna L. (Joanna Lynn) |
| author_sort | Kulik, Joanna L. (Joanna Lynn) |
| collection | MIT |
| description | Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995. |
| first_indexed | 2024-09-23T16:11:34Z |
| format | Thesis |
| id | mit-1721.1/38046 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T16:11:34Z |
| publishDate | 2007 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/380462019-04-10T18:27:16Z Implementing compiler optimizations using parallel graph reduction Kulik, Joanna L. (Joanna Lynn) Arvind. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science Electrical Engineering and Computer Science Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995. Includes bibliographical references (p. 85-87). by Joanna L. Kulik. M.S. 2007-07-18T13:29:05Z 2007-07-18T13:29:05Z 1995 1995 Thesis http://hdl.handle.net/1721.1/38046 32905613 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 106 p. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science Kulik, Joanna L. (Joanna Lynn) Implementing compiler optimizations using parallel graph reduction |
| title | Implementing compiler optimizations using parallel graph reduction |
| title_full | Implementing compiler optimizations using parallel graph reduction |
| title_fullStr | Implementing compiler optimizations using parallel graph reduction |
| title_full_unstemmed | Implementing compiler optimizations using parallel graph reduction |
| title_short | Implementing compiler optimizations using parallel graph reduction |
| title_sort | implementing compiler optimizations using parallel graph reduction |
| topic | Electrical Engineering and Computer Science |
| url | http://hdl.handle.net/1721.1/38046 |
| work_keys_str_mv | AT kulikjoannaljoannalynn implementingcompileroptimizationsusingparallelgraphreduction |