Characterization and requirements for Cu-Cu bonds for three-dimensional integrated circuits
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2007.
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Thesis |
| Language: | eng |
| Published: |
Massachusetts Institute of Technology
2007
|
| Subjects: | |
| Online Access: | http://hdl.handle.net/1721.1/38515 |
| _version_ | 1826211971427467264 |
|---|---|
| author | Tadepalli, Rajappa, 1979- |
| author2 | Carl V. Thompson. |
| author_facet | Carl V. Thompson. Tadepalli, Rajappa, 1979- |
| author_sort | Tadepalli, Rajappa, 1979- |
| collection | MIT |
| description | Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2007. |
| first_indexed | 2024-09-23T15:14:00Z |
| format | Thesis |
| id | mit-1721.1/38515 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T15:14:00Z |
| publishDate | 2007 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/385152019-04-12T09:08:58Z Characterization and requirements for Cu-Cu bonds for three-dimensional integrated circuits Characterization and requirements for copper-copper bonds for 3D IC Tadepalli, Rajappa, 1979- Carl V. Thompson. Massachusetts Institute of Technology. Dept. of Materials Science and Engineering. Massachusetts Institute of Technology. Dept. of Materials Science and Engineering. Materials Science and Engineering. Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2007. This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. Includes bibliographical references (p. 197-206). Three-dimensional integrated circuit (3D IC) technology enables heterogeneous integration of devices fabricated from different technologies, and reduces global RC delay by increasing the device density per unit chip area. Wafer-level Cu-Cu thermocompression bonding provides an attractive route to 3D IC fabrication, with Cu serving as both the electrical and mechanical interconnection between adjacent device layers. While the bonding process is currently employed for such applications, the lack of quantitative understanding of the bond quality and reliability has made developing robust processes extremely challenging. The current work addresses this problem through the development and implementation of bond toughness measurement techniques that investigate the effects of thin film patterning, surface chemistry and process parameters on the Cu-Cu bond quality under a range of loading conditions. The four-point bend test was used to quantify Cu-Cu bond toughness, Gc, under mixed-mode loading and to develop an optimized process flow that enabled the creation of high- toughness bonds (> 5 J/m2) at a bonding temperature of 300 oC. Mixed-mode loading induces significant plastic energy dissipation in ductile layers, resulting in an overestimation of the true adhesive strength of the interface. (cont.) The chevron test method has been developed to allow bond toughness measurements under mode I loading, thereby probing the 'true' work of adhesion of the bonded interface. Furthermore, analysis of the bonded chevron specimen with different layer thicknesses was performed to allow the specimen to be used to characterize the bonded interface under mixed-mode loading conditions. Chevron tests reveal that the toughness of patterned Cu films is a strong function of the feature size and orientation. For debond propagation across periodic bonded and unbonded regions, a pronounced increase in Gc was observed, compared to debond propagation along a continuous bonded interface. Effects of patterning were significantly different in ductile thermocompression and brittle fusion bonded systems, with the latter showing a reduction in toughness due to patterning. The ultimate limit of low temperature Cu-Cu adhesion was investigated using pull-off force measurements in Atomic Force Microscope (AFM) under ultra-high vacuum (UHV) conditions. These measurements show that the work of adhesion of Cu bonds created at room temperature is ~ 3 J/m2, similar to Gc for wafer-level bonds created at 300 oC and measured using the chevron test. (cont.) Deliberate pre-adhesion exposure of the Cu surfaces to 10-6 Torr O2 leads to a dramatic reduction in adhesion (to 0.1 J/m2), suggesting the formation of a Cu oxide that is detrimental to the Cu-Cu bonding process. The UHV-AFM measurements suggest that strong Cu-Cu bonds can be created by bonding clean Cu surfaces at room temperature, thereby eliminating several thermal stability issues in the thermocompression bonding process. The thermal management problem in 3D ICs containing multiple device layers was examined using an analytical model of forced liquid cooling via Cu-sealed integrated microchannels. Integration of microchannels requires a reduction in the area available for interconnects and adhesion, causing a trade-off between the inter-layer bonded area and the size and density of the channels that can be included. The optimum channel density is a function of the achievable local Cu-Cu bond strength. by Rajappa Tadepalli. Ph.D. 2007-08-29T19:05:07Z 2007-08-29T19:05:07Z 2007 2007 Thesis http://hdl.handle.net/1721.1/38515 156572821 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 206 p. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Materials Science and Engineering. Tadepalli, Rajappa, 1979- Characterization and requirements for Cu-Cu bonds for three-dimensional integrated circuits |
| title | Characterization and requirements for Cu-Cu bonds for three-dimensional integrated circuits |
| title_full | Characterization and requirements for Cu-Cu bonds for three-dimensional integrated circuits |
| title_fullStr | Characterization and requirements for Cu-Cu bonds for three-dimensional integrated circuits |
| title_full_unstemmed | Characterization and requirements for Cu-Cu bonds for three-dimensional integrated circuits |
| title_short | Characterization and requirements for Cu-Cu bonds for three-dimensional integrated circuits |
| title_sort | characterization and requirements for cu cu bonds for three dimensional integrated circuits |
| topic | Materials Science and Engineering. |
| url | http://hdl.handle.net/1721.1/38515 |
| work_keys_str_mv | AT tadepallirajappa1979 characterizationandrequirementsforcucubondsforthreedimensionalintegratedcircuits AT tadepallirajappa1979 characterizationandrequirementsforcoppercopperbondsfor3dic |