Floating point multiply/add unit for the M-machine node processor

Floating point multiply/add unit for the M-machine node processor

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1996.

Bibliographic Details
Main Author:	Hartman, Daniel K
Other Authors:	Wililam J. Dally.
Format:	Thesis
Language:	eng
Published:	Massachusetts Institute of Technology 2007
Subjects:	Electrical Engineering and Computer Science
Online Access:	http://hdl.handle.net/1721.1/38791

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