Substrate Resistance Extraction Using a Multi-Domain Surface Integral Formulation

In order to assess and optimize layout strategies for minimizing substrate noise, it is necessary to have fast and accurate techniques for computing contact coupling resistances associated with the substrate. In this talk, we describe an extraction method capable of full-chip analysis which combines...

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Bibliographic Details
Main Authors: Vithayathil, Anne, Hu, Xin, White, Jacob K.
Format: Article
Language:en_US
Published: 2003
Subjects:
Online Access:http://hdl.handle.net/1721.1/3923
Description
Summary:In order to assess and optimize layout strategies for minimizing substrate noise, it is necessary to have fast and accurate techniques for computing contact coupling resistances associated with the substrate. In this talk, we describe an extraction method capable of full-chip analysis which combines modest geometric approximations, a novel integral formulation, and an FFT-accelerated preconditioned iterative method.