The design and construction of a data path chip set for a fault tolerant parallel processor
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1991.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2008
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| Online Access: | http://hdl.handle.net/1721.1/39961 |
| _version_ | 1811086085495717888 |
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| author | Sakamaki, Charles E. (Charles Euriku) |
| author2 | Thomas F. Knight. |
| author_facet | Thomas F. Knight. Sakamaki, Charles E. (Charles Euriku) |
| author_sort | Sakamaki, Charles E. (Charles Euriku) |
| collection | MIT |
| description | Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1991. |
| first_indexed | 2024-09-23T13:20:39Z |
| format | Thesis |
| id | mit-1721.1/39961 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T13:20:39Z |
| publishDate | 2008 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/399612019-04-10T08:21:01Z The design and construction of a data path chip set for a fault tolerant parallel processor Sakamaki, Charles E. (Charles Euriku) Thomas F. Knight. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science Electrical Engineering and Computer Science Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1991. Includes bibliographical references (p. 165-167). by Charles E. Sakamaki. M.S. 2008-01-10T16:08:13Z 2008-01-10T16:08:13Z 1991 1991 Thesis http://hdl.handle.net/1721.1/39961 25055531 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 167 p. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science Sakamaki, Charles E. (Charles Euriku) The design and construction of a data path chip set for a fault tolerant parallel processor |
| title | The design and construction of a data path chip set for a fault tolerant parallel processor |
| title_full | The design and construction of a data path chip set for a fault tolerant parallel processor |
| title_fullStr | The design and construction of a data path chip set for a fault tolerant parallel processor |
| title_full_unstemmed | The design and construction of a data path chip set for a fault tolerant parallel processor |
| title_short | The design and construction of a data path chip set for a fault tolerant parallel processor |
| title_sort | design and construction of a data path chip set for a fault tolerant parallel processor |
| topic | Electrical Engineering and Computer Science |
| url | http://hdl.handle.net/1721.1/39961 |
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