The design and construction of a data path chip set for a fault tolerant parallel processor

The design and construction of a data path chip set for a fault tolerant parallel processor

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1991.

Bibliographic Details
Main Author: Sakamaki, Charles E. (Charles Euriku)
Other Authors: Thomas F. Knight.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2008
Subjects:
Electrical Engineering and Computer Science
Online Access:http://hdl.handle.net/1721.1/39961

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