Hardware modeling and top-down design using VHDL
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1991.
| Main Author: | |
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| Other Authors: | |
| Format: | Thesis |
| Language: | eng |
| Published: |
Massachusetts Institute of Technology
2008
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| Online Access: | http://hdl.handle.net/1721.1/39962 |
| _version_ | 1811086104904859648 |
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| author | Morton, Dennis P. (Dennis Paul) |
| author2 | Jonathan Allen. |
| author_facet | Jonathan Allen. Morton, Dennis P. (Dennis Paul) |
| author_sort | Morton, Dennis P. (Dennis Paul) |
| collection | MIT |
| description | Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1991. |
| first_indexed | 2024-09-23T13:20:59Z |
| format | Thesis |
| id | mit-1721.1/39962 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T13:20:59Z |
| publishDate | 2008 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/399622019-04-10T18:27:31Z Hardware modeling and top-down design using VHDL Morton, Dennis P. (Dennis Paul) Jonathan Allen. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science Electrical Engineering and Computer Science Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1991. Includes bibliographical references (leaf 237). by Dennis P. Morton. M.S. 2008-01-10T16:08:21Z 2008-01-10T16:08:21Z 1991 1991 Thesis http://hdl.handle.net/1721.1/39962 25325043 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 237 leaves application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science Morton, Dennis P. (Dennis Paul) Hardware modeling and top-down design using VHDL |
| title | Hardware modeling and top-down design using VHDL |
| title_full | Hardware modeling and top-down design using VHDL |
| title_fullStr | Hardware modeling and top-down design using VHDL |
| title_full_unstemmed | Hardware modeling and top-down design using VHDL |
| title_short | Hardware modeling and top-down design using VHDL |
| title_sort | hardware modeling and top down design using vhdl |
| topic | Electrical Engineering and Computer Science |
| url | http://hdl.handle.net/1721.1/39962 |
| work_keys_str_mv | AT mortondennispdennispaul hardwaremodelingandtopdowndesignusingvhdl |