Environmentally benign manufacturing of three dimensional integrated circuits
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2007.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2008
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| Online Access: | http://hdl.handle.net/1721.1/40350 |
| _version_ | 1811082924326387712 |
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| author | Somani, Ajay |
| author2 | Duane S. Boning. |
| author_facet | Duane S. Boning. Somani, Ajay |
| author_sort | Somani, Ajay |
| collection | MIT |
| description | Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2007. |
| first_indexed | 2024-09-23T12:13:37Z |
| format | Thesis |
| id | mit-1721.1/40350 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T12:13:37Z |
| publishDate | 2008 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/403502019-04-12T09:35:04Z Environmentally benign manufacturing of three dimensional integrated circuits Manufacturing of three dimensional integrated circuits Somani, Ajay Duane S. Boning. Massachusetts Institute of Technology. Dept. of Materials Science and Engineering. Massachusetts Institute of Technology. Dept. of Materials Science and Engineering. Materials Science and Engineering. Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2007. Includes bibliographical references (p. 221-231). Along with scaling down in size, novel materials have been introduced into the semiconductor industry to enable continued improvements in performance and cost as predicted by Moore's law. It has become important now more than ever to include an environmental impact evaluation of future technologies, before they are introduced into manufacturing, in order to identify potentially environmentally harmful materials or processes and understand their implications, costs, and mitigation requirements. In this thesis, we introduce a methodology to compare alternative options on the environmental axis, along with the cost and performance axes, in order to create environmentally aware and benign technologies. This methodology also helps to identify potential performance and cost issues in novel technologies by taking a transparent and bottoms-up assessment approach. This methodology is applied to the evaluation of the MIT 3D IC technology in comparison to a standard CMOS 2D IC approach. Both options are compared on all three axes - performance, cost and environmental impact. (cont.) The "handle wafer" unit process in the existing 3D IC technology, which is a crucial process for back-to-face integration, is found to have a large environmental impact because of its use of thick metal sacrificial layers and high energy consumption. We explore three different handle wafer options, between-die channel, oxide release layer, and alternative low-temperature permanent bonding. The first two approaches use a chemical handle wafer release mechanism; while the third explores solid liquid inter-diffusion (SLID) bonding using copper-indium at 2000C. Preliminary results for copper-indium bonding indicate that a sub-micron thick multi-layer copper-indium stack, when bonded to a 300 nm thick copper film results in large voids in the bonding interface primarily due to rough as-deposited films. Finally, we conduct an overall assessment of these and other proposed handle wafer technologies. The overall assessment shows that but the oxide release layer approach appears promising; however, each process option has its strength and weaknesses, which need to be understood and pursued accordingly. by Ajay Somani. Ph.D. 2008-02-27T22:10:35Z 2008-02-27T22:10:35Z 2007 2007 Thesis http://hdl.handle.net/1721.1/40350 174042756 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 268 p. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Materials Science and Engineering. Somani, Ajay Environmentally benign manufacturing of three dimensional integrated circuits |
| title | Environmentally benign manufacturing of three dimensional integrated circuits |
| title_full | Environmentally benign manufacturing of three dimensional integrated circuits |
| title_fullStr | Environmentally benign manufacturing of three dimensional integrated circuits |
| title_full_unstemmed | Environmentally benign manufacturing of three dimensional integrated circuits |
| title_short | Environmentally benign manufacturing of three dimensional integrated circuits |
| title_sort | environmentally benign manufacturing of three dimensional integrated circuits |
| topic | Materials Science and Engineering. |
| url | http://hdl.handle.net/1721.1/40350 |
| work_keys_str_mv | AT somaniajay environmentallybenignmanufacturingofthreedimensionalintegratedcircuits AT somaniajay manufacturingofthreedimensionalintegratedcircuits |