An ultra-low-power neural recording amplifier and its use in adaptively-biased multi-amplifier arrays
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2008
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| Online Access: | http://hdl.handle.net/1721.1/40541 |
| _version_ | 1826192859660812288 |
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| author | Wattanapanitch, Woradorn |
| author2 | Rahul Sarpeshkar. |
| author_facet | Rahul Sarpeshkar. Wattanapanitch, Woradorn |
| author_sort | Wattanapanitch, Woradorn |
| collection | MIT |
| description | Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007. |
| first_indexed | 2024-09-23T09:29:58Z |
| format | Thesis |
| id | mit-1721.1/40541 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T09:29:58Z |
| publishDate | 2008 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/405412019-04-11T04:20:58Z An ultra-low-power neural recording amplifier and its use in adaptively-biased multi-amplifier arrays Wattanapanitch, Woradorn Rahul Sarpeshkar. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007. Includes bibliographical references (p. 99-101). The design of a micropower energy-efficient neural recording amplifier is presented. The amplifier appears to be the lowest power and most energy-efficient neural recording amplifier reported to date. I describe low-noise design techniques that help the neural amplifier achieve an input-referred noise that is near the theoretical limit of any amplifier using a differential pair as an input stage. The bandwidth of the amplifier can be adjusted for recording either neural spikes or local field potentials (LFP). When configured for recording neural spikes, the amplifier yielded a midband gain of 40.8 dB and -3 dB bandwidth from 45 Hz to 5.32 kHz; the amplifier's input-referred noise was measured to be 3.06 [mu]Vrms, while consuming 7.56 [mu]W of power from a 2.8 V supply corresponding to a Noise Efficiency Factor (NEF) of 2.67 with the theoretical limit being 2.02. When configured for recording LFPs, the amplifier achieved a midband gain of 40.9 dB and a -3 dB bandwidth from 392 mHz to 295 Hz; the input-referred noise was 1.66 [mu]Vrms, while consuming 2.08 AW from a 2.8 V supply corresponding to an NEF of 3.21. The amplifier was fabricated in AMI's 0.5 im CMOS process and occupies 0.16 mm2 of chip area. The designs of two previous amplifiers that have been attempted are also presented. Even though they do not achieve optimal performances, the design insights obtained have led to a successful implementation of the energy-efficient neural amplifier discussed above. (cont.) Finally, the adaptive biasing technique is discussed. The design and the detailed analysis of a feedback calibration loop for adjusting the input-referred noise of the amplifier based on the information extracted from the recording site's background noise is also presented. With such an adaptive biasing scheme, significant power savings in a multi-electrode array may be achieved since each amplifier operates with just enough power such that its input-referred noise is significantly but not overly below the neural noise. by Woradorn Wattanapanitch. S.M. 2008-02-27T22:45:27Z 2008-02-27T22:45:27Z 2007 2007 Thesis http://hdl.handle.net/1721.1/40541 192003733 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 101 p. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Wattanapanitch, Woradorn An ultra-low-power neural recording amplifier and its use in adaptively-biased multi-amplifier arrays |
| title | An ultra-low-power neural recording amplifier and its use in adaptively-biased multi-amplifier arrays |
| title_full | An ultra-low-power neural recording amplifier and its use in adaptively-biased multi-amplifier arrays |
| title_fullStr | An ultra-low-power neural recording amplifier and its use in adaptively-biased multi-amplifier arrays |
| title_full_unstemmed | An ultra-low-power neural recording amplifier and its use in adaptively-biased multi-amplifier arrays |
| title_short | An ultra-low-power neural recording amplifier and its use in adaptively-biased multi-amplifier arrays |
| title_sort | ultra low power neural recording amplifier and its use in adaptively biased multi amplifier arrays |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/40541 |
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