A 4kb memory array for MRAM development
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.
Main Author: | |
---|---|
Other Authors: | |
Format: | Thesis |
Language: | eng |
Published: |
Massachusetts Institute of Technology
2008
|
Subjects: | |
Online Access: | http://hdl.handle.net/1721.1/41552 |
_version_ | 1826193257763176448 |
---|---|
author | Qazi, Masood |
author2 | John K. DeBrosse and Anantha P. Chandrakasan. |
author_facet | John K. DeBrosse and Anantha P. Chandrakasan. Qazi, Masood |
author_sort | Qazi, Masood |
collection | MIT |
description | Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007. |
first_indexed | 2024-09-23T09:36:05Z |
format | Thesis |
id | mit-1721.1/41552 |
institution | Massachusetts Institute of Technology |
language | eng |
last_indexed | 2024-09-23T09:36:05Z |
publishDate | 2008 |
publisher | Massachusetts Institute of Technology |
record_format | dspace |
spelling | mit-1721.1/415522019-04-11T14:25:02Z A 4kb memory array for MRAM development Four kilobyte memory array for Magnetic Random Access Memory development Qazi, Masood John K. DeBrosse and Anantha P. Chandrakasan. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007. This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. Includes bibliographical references (p. 129-131). The circuits for a A 4kb array of Magnetic Tunnel Junctions (MTJs) have been designed and fabricated in a 0:18¹m CMOS process with three levels of metal. Support circuitry for addressing, reading, writing, and test mode probing enables the characterization of the switching of a thin-film ferromagnetic layer in the MTJs. Specifically, novel mechanisms involving spin-transfer or thermal assistance can be studied and compared to current MRAM designs that switch the MTJ with current-induced magnetic fields. Using this array design, both high speed digital and quasi-static dI/dV experiments can be conducted to investigate the nature of the MTJ resistance hysteresis and process variation in addition to the switching behavior under both polarities of current. by Masood Qazi. M.Eng. 2008-05-19T15:00:13Z 2008-05-19T15:00:13Z 2007 2007 Thesis http://hdl.handle.net/1721.1/41552 220933302 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 131 p. application/pdf Massachusetts Institute of Technology |
spellingShingle | Electrical Engineering and Computer Science. Qazi, Masood A 4kb memory array for MRAM development |
title | A 4kb memory array for MRAM development |
title_full | A 4kb memory array for MRAM development |
title_fullStr | A 4kb memory array for MRAM development |
title_full_unstemmed | A 4kb memory array for MRAM development |
title_short | A 4kb memory array for MRAM development |
title_sort | 4kb memory array for mram development |
topic | Electrical Engineering and Computer Science. |
url | http://hdl.handle.net/1721.1/41552 |
work_keys_str_mv | AT qazimasood a4kbmemoryarrayformramdevelopment AT qazimasood fourkilobytememoryarrayformagneticrandomaccessmemorydevelopment AT qazimasood 4kbmemoryarrayformramdevelopment |