On-die signal integrity monitoring of gigabit serial I/Os
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.
| Main Author: | |
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| Other Authors: | |
| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2008
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| Online Access: | http://hdl.handle.net/1721.1/41609 |
| _version_ | 1811093601104429056 |
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| author | Moore, Alexander Wyatt |
| author2 | Vladimir Stojanović and David Rowe. |
| author_facet | Vladimir Stojanović and David Rowe. Moore, Alexander Wyatt |
| author_sort | Moore, Alexander Wyatt |
| collection | MIT |
| description | Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006. |
| first_indexed | 2024-09-23T15:47:43Z |
| format | Thesis |
| id | mit-1721.1/41609 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T15:47:43Z |
| publishDate | 2008 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/416092019-04-11T14:37:32Z On-die signal integrity monitoring of gigabit serial I/Os Moore, Alexander Wyatt Vladimir Stojanović and David Rowe. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006. Includes bibliographical references (leaves 93-94). This thesis describes an embedded undersampling system for capturing analog wave-forms and monitoring signal integrity throughout a signal path. It is intended for use in Gigabit serial products, such as crosspoints and other networking products. Design reuse and simple components were the most important design parameters. The system has a small layout, a simple digital interface, and does not require a separate sample-and--hold circuit. The final system has 15 mV minimum resolution, operates over common-mode logic signals from 1.8V to 1.4V, and accurately captures signals up to 2GHz. by Alexander Wyatt Moore. M.Eng. 2008-05-19T16:00:20Z 2008-05-19T16:00:20Z 2006 2006 Thesis http://hdl.handle.net/1721.1/41609 216829581 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 94 leaves application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Moore, Alexander Wyatt On-die signal integrity monitoring of gigabit serial I/Os |
| title | On-die signal integrity monitoring of gigabit serial I/Os |
| title_full | On-die signal integrity monitoring of gigabit serial I/Os |
| title_fullStr | On-die signal integrity monitoring of gigabit serial I/Os |
| title_full_unstemmed | On-die signal integrity monitoring of gigabit serial I/Os |
| title_short | On-die signal integrity monitoring of gigabit serial I/Os |
| title_sort | on die signal integrity monitoring of gigabit serial i os |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/41609 |
| work_keys_str_mv | AT moorealexanderwyatt ondiesignalintegritymonitoringofgigabitserialios |