Graph-based representations and coupled verification of VLSI schematics and layouts

Graph-based representations and coupled verification of VLSI schematics and layouts

Includes bibliographical references (p. 199-202).

Bibliographic Details
Other Authors:	Bamji, Cyrus S.
Language:	eng
Published:	Research Laboratory of Electronics, Massachusetts Institute of Technology 2004
Subjects:	TK7855.M41 R43 no.547
Online Access:	http://hdl.handle.net/1721.1/4205

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