Procedural layout of a high-speed floating-point arithmetic unit
Originally presented as author's thesis (Electrical Engineer --Massachusetts Institute of Technology) 1985.
| Other Authors: | |
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| Language: | eng |
| Published: |
Massachusetts Institute of Technology, Research Laboratory of Electronics
2004
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| Subjects: | |
| Online Access: | http://hdl.handle.net/1721.1/4235 |
| _version_ | 1811095039939444736 |
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| author2 | Armstrong, Robert Clyde. |
| author_facet | Armstrong, Robert Clyde. |
| collection | MIT |
| description | Originally presented as author's thesis (Electrical Engineer --Massachusetts Institute of Technology) 1985. |
| first_indexed | 2024-09-23T16:09:33Z |
| id | mit-1721.1/4235 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T16:09:33Z |
| publishDate | 2004 |
| publisher | Massachusetts Institute of Technology, Research Laboratory of Electronics |
| record_format | dspace |
| spelling | mit-1721.1/42352019-04-12T08:20:01Z Procedural layout of a high-speed floating-point arithmetic unit Armstrong, Robert Clyde. TK7855.M41 R43 no.508 Originally presented as author's thesis (Electrical Engineer --Massachusetts Institute of Technology) 1985. Bibliography: leaf 116. Supported in part by the U.S. Air Force Office of Scientific Research contract F49620-84-C-0004 Robert Clyde Armstrong. 2004-03-02T18:52:17Z 2004-03-02T18:52:17Z 1985 no 508 http://hdl.handle.net/1721.1/4235 eng Technical report (Massachusetts Institute of Technology. Research Laboratory of Electronics) ; 508. 116 p. 6588811 bytes application/pdf application/pdf Massachusetts Institute of Technology, Research Laboratory of Electronics |
| spellingShingle | TK7855.M41 R43 no.508 Procedural layout of a high-speed floating-point arithmetic unit |
| title | Procedural layout of a high-speed floating-point arithmetic unit |
| title_full | Procedural layout of a high-speed floating-point arithmetic unit |
| title_fullStr | Procedural layout of a high-speed floating-point arithmetic unit |
| title_full_unstemmed | Procedural layout of a high-speed floating-point arithmetic unit |
| title_short | Procedural layout of a high-speed floating-point arithmetic unit |
| title_sort | procedural layout of a high speed floating point arithmetic unit |
| topic | TK7855.M41 R43 no.508 |
| url | http://hdl.handle.net/1721.1/4235 |