An optimized hardware architecture and communication protocol for scheduled communication
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1997.
| Main Author: | |
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| Other Authors: | |
| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2008
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| Online Access: | http://hdl.handle.net/1721.1/42660 |
| _version_ | 1826218159502262272 |
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| author | Shoemaker, David R. (David Robert) |
| author2 | Stephen A. Ward. |
| author_facet | Stephen A. Ward. Shoemaker, David R. (David Robert) |
| author_sort | Shoemaker, David R. (David Robert) |
| collection | MIT |
| description | Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1997. |
| first_indexed | 2024-09-23T17:14:49Z |
| format | Thesis |
| id | mit-1721.1/42660 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T17:14:49Z |
| publishDate | 2008 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/426602019-04-12T09:25:36Z An optimized hardware architecture and communication protocol for scheduled communication Shoemaker, David R. (David Robert) Stephen A. Ward. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science Electrical Engineering and Computer Science Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1997. Includes bibliographical references (p. 173-177). by David Shoemaker. Ph.D. 2008-09-03T17:49:54Z 2008-09-03T17:49:54Z 1997 1997 Thesis http://hdl.handle.net/1721.1/42660 37639534 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 228 p. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science Shoemaker, David R. (David Robert) An optimized hardware architecture and communication protocol for scheduled communication |
| title | An optimized hardware architecture and communication protocol for scheduled communication |
| title_full | An optimized hardware architecture and communication protocol for scheduled communication |
| title_fullStr | An optimized hardware architecture and communication protocol for scheduled communication |
| title_full_unstemmed | An optimized hardware architecture and communication protocol for scheduled communication |
| title_short | An optimized hardware architecture and communication protocol for scheduled communication |
| title_sort | optimized hardware architecture and communication protocol for scheduled communication |
| topic | Electrical Engineering and Computer Science |
| url | http://hdl.handle.net/1721.1/42660 |
| work_keys_str_mv | AT shoemakerdavidrdavidrobert anoptimizedhardwarearchitectureandcommunicationprotocolforscheduledcommunication AT shoemakerdavidrdavidrobert optimizedhardwarearchitectureandcommunicationprotocolforscheduledcommunication |