Reducing exception management overhead with software restart markers
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2008
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| Online Access: | http://hdl.handle.net/1721.1/43034 |
| _version_ | 1826198267942141952 |
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| author | Hampton, Mark Jerome, 1977- |
| author2 | Krste Asanović. |
| author_facet | Krste Asanović. Hampton, Mark Jerome, 1977- |
| author_sort | Hampton, Mark Jerome, 1977- |
| collection | MIT |
| description | Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008. |
| first_indexed | 2024-09-23T11:02:07Z |
| format | Thesis |
| id | mit-1721.1/43034 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T11:02:07Z |
| publishDate | 2008 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/430342019-04-11T01:47:07Z Reducing exception management overhead with software restart markers Hampton, Mark Jerome, 1977- Krste Asanović. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008. Includes bibliographical references (p. 181-196). Modern processors rely on exception handling mechanisms to detect errors and to implement various features such as virtual memory. However, these mechanisms are typically hardware-intensive because of the need to buffer partially-completed instructions to implement precise exceptions and enforce in-order instruction commit, often leading to issues with performance and energy efficiency. The situation is exacerbated in highly parallel machines with large quantities of programmer-visible state, such as VLIW or vector processors. As architects increasingly rely on parallel architectures to achieve higher performance, the problem of exception handling is becoming critical. In this thesis, I present software restart markers as the foundation of an exception handling mechanism for explicitly parallel architectures. With this model, the compiler is responsible for delimiting regions of idempotent code. If an exception occurs, the operating system will resume execution from the beginning of the region. One advantage of this approach is that instruction results can be committed to architectural state in any order within a region, eliminating the need to buffer those values. Enabling out-of-order commit can substantially reduce the exception management overhead found in precise exception implementations, and enable the use of new architectural features that might be prohibitively costly with conventional precise exception implementations. Additionally, software restart markers can be used to reduce context switch overhead in a multiprogrammed environment. This thesis demonstrates the applicability of software restart markers to vector, VLIW, and multithreaded architectures. It also contains an implementation of this exception handling approach that uses the Trimaran compiler infrastructure to target the Scale vectorthread architecture. I show that using software restart markers incurs very little performance overhead for vector-style execution on Scale. (cont.) Finally, I describe the Scale compiler flow developed as part of this work and discuss how it targets certain features facilitated by the use of software restart markers by Mark Jerome Hampton. Ph.D. 2008-11-07T18:54:33Z 2008-11-07T18:54:33Z 2008 2008 Thesis http://hdl.handle.net/1721.1/43034 243608776 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 196 p. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Hampton, Mark Jerome, 1977- Reducing exception management overhead with software restart markers |
| title | Reducing exception management overhead with software restart markers |
| title_full | Reducing exception management overhead with software restart markers |
| title_fullStr | Reducing exception management overhead with software restart markers |
| title_full_unstemmed | Reducing exception management overhead with software restart markers |
| title_short | Reducing exception management overhead with software restart markers |
| title_sort | reducing exception management overhead with software restart markers |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/43034 |
| work_keys_str_mv | AT hamptonmarkjerome1977 reducingexceptionmanagementoverheadwithsoftwarerestartmarkers |