Scalable SRAM design
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1997.
Main Author: | Wuu, John J. (John Jung-Sheun) |
---|---|
Other Authors: | Anantha Chandrakasan. |
Format: | Thesis |
Language: | eng |
Published: |
Massachusetts Institute of Technology
2008
|
Subjects: | |
Online Access: | http://hdl.handle.net/1721.1/43380 |
Similar Items
-
Ultra-dynamic voltage scalable (U-DVS) SRAM design considerations
by: Sinangil, Mahmut E. (Mahmut Ersin)
Published: (2009) -
Fault tolerant, low voltage SRAM design
by: Sinangil, Yildiz
Published: (2010) -
Design of resonant-tunneling diodes for a GaAs integrated SRAM
by: Aggarwal, Rajni J
Published: (2008) -
Energy-efficient SRAM design in 28nm FDSOI Technology
by: Biswas, Avishek, Ph. D. Massachusetts Institute of Technology
Published: (2014) -
Ultra-low-power SRAM design in high variability advanced CMOS
by: Verma, Naveen
Published: (2010)