A high performance zero-crossing based pipelined analog-to-digital converter
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2009
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| Online Access: | http://hdl.handle.net/1721.1/44377 |
| _version_ | 1826191055279620096 |
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| author | Chu, Yue Jack |
| author2 | Hae-Seung Lee. |
| author_facet | Hae-Seung Lee. Chu, Yue Jack |
| author_sort | Chu, Yue Jack |
| collection | MIT |
| description | Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008. |
| first_indexed | 2024-09-23T08:49:28Z |
| format | Thesis |
| id | mit-1721.1/44377 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T08:49:28Z |
| publishDate | 2009 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/443772019-04-10T19:14:59Z A high performance zero-crossing based pipelined analog-to-digital converter Chu, Yue Jack Hae-Seung Lee. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008. Includes bibliographical references (leaves 46-47). In this thesis, I describe a zero-crossing based pipelined ADC. Unlike traditional pipelined ADCs, this work does not use any op-amps in the signal path. The use of zero-crossing based circuits made it possible to achieve a much better figure of merit. The ADC is design to operate at 200MS/s with a resolution of 12 bits. The simulated results suggest that the target performance is achievable with less than 10 mW of power. This design's figure of merit is at least an order of magnitude better than any existing designs that have comparable speed and accuracy performance. The design will be fabricated later to be tested in silicon. by Yue Jack Chu. S.M. 2009-01-30T16:39:08Z 2009-01-30T16:39:08Z 2008 2008 Thesis http://hdl.handle.net/1721.1/44377 276947916 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 47 leaves application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Chu, Yue Jack A high performance zero-crossing based pipelined analog-to-digital converter |
| title | A high performance zero-crossing based pipelined analog-to-digital converter |
| title_full | A high performance zero-crossing based pipelined analog-to-digital converter |
| title_fullStr | A high performance zero-crossing based pipelined analog-to-digital converter |
| title_full_unstemmed | A high performance zero-crossing based pipelined analog-to-digital converter |
| title_short | A high performance zero-crossing based pipelined analog-to-digital converter |
| title_sort | high performance zero crossing based pipelined analog to digital converter |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/44377 |
| work_keys_str_mv | AT chuyuejack ahighperformancezerocrossingbasedpipelinedanalogtodigitalconverter AT chuyuejack highperformancezerocrossingbasedpipelinedanalogtodigitalconverter |