Goal-oriented hardware design
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2009
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| Online Access: | http://hdl.handle.net/1721.1/45853 |
| _version_ | 1811079134492753920 |
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| author | Chau, Man Ping Grace |
| author2 | Steve Ward. |
| author_facet | Steve Ward. Chau, Man Ping Grace |
| author_sort | Chau, Man Ping Grace |
| collection | MIT |
| description | Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008. |
| first_indexed | 2024-09-23T11:10:31Z |
| format | Thesis |
| id | mit-1721.1/45853 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T11:10:31Z |
| publishDate | 2009 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/458532019-04-11T02:54:09Z Goal-oriented hardware design Chau, Man Ping Grace Steve Ward. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008. Includes bibliographical references (p. 145-146). This thesis presents Fide, a hardware design system that uses Goal-oriented programming. Goal-oriented programming is a programming framework to specify open-ended decision logic. This approach relies on two fundamental concepts-Goals and Techniques. Goals encode decision points and Techniques are scripts that describe how to satisfy Goals. In Fide, Goals represent the functional requirements (e.g., addition of two 32-bit binary integers) of the target circuit. Techniques represent hardware implementation alternatives that fulfill the functions. Techniques may declare their own subgoals, allowing a hierarchical decomposition of the functions. A Planner selects among Techniques based on the Goals declared to generate an implementation of the target circuit automatically. Users' preferences can be added to generate circuits for different scenarios: for different hardware environments, under different circuit constraints, or different implementation criteria etc. A Beta processor is implemented using Fide. The quality of the implementation is comparable to those optimized manually. by Man Ping Grace Chau. S.M. 2009-06-30T16:26:06Z 2009-06-30T16:26:06Z 2008 2008 Thesis http://hdl.handle.net/1721.1/45853 319706230 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 146 p. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Chau, Man Ping Grace Goal-oriented hardware design |
| title | Goal-oriented hardware design |
| title_full | Goal-oriented hardware design |
| title_fullStr | Goal-oriented hardware design |
| title_full_unstemmed | Goal-oriented hardware design |
| title_short | Goal-oriented hardware design |
| title_sort | goal oriented hardware design |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/45853 |
| work_keys_str_mv | AT chaumanpinggrace goalorientedhardwaredesign |