An exploratory design of a 65 nm CMOS buck converter for maximum efficiency
Includes bibliographical references (p. 75-76).
| Main Author: | |
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| Other Authors: | |
| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2009
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| Online Access: | http://hdl.handle.net/1721.1/46024 |
| _version_ | 1811078602210410496 |
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| author | Lin, Doris, M. Eng. Massachusetts Institute of Technology |
| author2 | David J. Perreault. |
| author_facet | David J. Perreault. Lin, Doris, M. Eng. Massachusetts Institute of Technology |
| author_sort | Lin, Doris, M. Eng. Massachusetts Institute of Technology |
| collection | MIT |
| description | Includes bibliographical references (p. 75-76). |
| first_indexed | 2024-09-23T11:02:51Z |
| format | Thesis |
| id | mit-1721.1/46024 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T11:02:51Z |
| publishDate | 2009 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/460242019-04-11T12:37:09Z An exploratory design of a 65 nm CMOS buck converter for maximum efficiency Designing a 65nm buck converter for maximum efficiency Lin, Doris, M. Eng. Massachusetts Institute of Technology David J. Perreault. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Includes bibliographical references (p. 75-76). Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008. Portable battery-operated consumer devices, such as mp3 players, cell phones, and digital cameras, are becoming ever more prevalent and so the need for long battery life is increasingly important. These small devices contain power converters that produce lower supply voltages from the fixed battery voltage source. For long battery life, it is necessary to maximize the efficiency of the power converter. A design is proposed for the topology and control of a 65 nm CMOS DC/DC switch-mode converter converting a 3 V battery supply to a 1.2 V output voltage for a maximum output current of 100 mA. The goal of the project was to maximize converter efficiency and improve on the maximum 40% efficiency of a traditional linear regulator. With the proposed topology and control scheme described in this report, the buck converter operates at a switching frequency of 10 to 75 MHz with a maximum efficiency of 93.63%. by Doris Lin. M.Eng. 2009-06-30T17:03:39Z 2009-06-30T17:03:39Z 2008 2008 Thesis http://hdl.handle.net/1721.1/46024 367588220 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 76 p. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Lin, Doris, M. Eng. Massachusetts Institute of Technology An exploratory design of a 65 nm CMOS buck converter for maximum efficiency |
| title | An exploratory design of a 65 nm CMOS buck converter for maximum efficiency |
| title_full | An exploratory design of a 65 nm CMOS buck converter for maximum efficiency |
| title_fullStr | An exploratory design of a 65 nm CMOS buck converter for maximum efficiency |
| title_full_unstemmed | An exploratory design of a 65 nm CMOS buck converter for maximum efficiency |
| title_short | An exploratory design of a 65 nm CMOS buck converter for maximum efficiency |
| title_sort | exploratory design of a 65 nm cmos buck converter for maximum efficiency |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/46024 |
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