An exploratory design of a 65 nm CMOS buck converter for maximum efficiency

An exploratory design of a 65 nm CMOS buck converter for maximum efficiency

Includes bibliographical references (p. 75-76).

Bibliographic Details
Main Author:	Lin, Doris, M. Eng. Massachusetts Institute of Technology
Other Authors:	David J. Perreault.
Format:	Thesis
Language:	eng
Published:	Massachusetts Institute of Technology 2009
Subjects:	Electrical Engineering and Computer Science.
Online Access:	http://hdl.handle.net/1721.1/46024

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