Near room temperature lithographically processed metal-oxide transistors
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2009
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| Online Access: | http://hdl.handle.net/1721.1/46524 |
| _version_ | 1811082079161548800 |
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| author | Tang, Hui, M. Eng. Massachusetts Institute of Technology |
| author2 | Vladimir Bulovic. |
| author_facet | Vladimir Bulovic. Tang, Hui, M. Eng. Massachusetts Institute of Technology |
| author_sort | Tang, Hui, M. Eng. Massachusetts Institute of Technology |
| collection | MIT |
| description | Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008. |
| first_indexed | 2024-09-23T11:57:14Z |
| format | Thesis |
| id | mit-1721.1/46524 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T11:57:14Z |
| publishDate | 2009 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/465242019-04-10T08:21:52Z Near room temperature lithographically processed metal-oxide transistors Tang, Hui, M. Eng. Massachusetts Institute of Technology Vladimir Bulovic. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008. Includes bibliographical references (p. 75-76). A fully lithographic process at near-room-temperature was developed for the purpose of fabricating transistors based on metal-oxide channel materials. The combination of indium tin oxide (ITO) as the source/drain electrodes, zinc indium oxide (ZIO) as the semiconducting channel, and parylene as the dielectric was used to demonstrate the feasibility of such a low temperature lithographic process. This low processing temperature, roughly 150 C, enables the use of unconventional substrates such as glass or plastics, and can therefore simplify the fabrication of devices for low-cost, large-area electronics. by Hui Tang. M.Eng. 2009-08-26T16:42:09Z 2009-08-26T16:42:09Z 2008 2008 Thesis http://hdl.handle.net/1721.1/46524 413972514 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 76 p. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Tang, Hui, M. Eng. Massachusetts Institute of Technology Near room temperature lithographically processed metal-oxide transistors |
| title | Near room temperature lithographically processed metal-oxide transistors |
| title_full | Near room temperature lithographically processed metal-oxide transistors |
| title_fullStr | Near room temperature lithographically processed metal-oxide transistors |
| title_full_unstemmed | Near room temperature lithographically processed metal-oxide transistors |
| title_short | Near room temperature lithographically processed metal-oxide transistors |
| title_sort | near room temperature lithographically processed metal oxide transistors |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/46524 |
| work_keys_str_mv | AT tanghuimengmassachusettsinstituteoftechnology nearroomtemperaturelithographicallyprocessedmetaloxidetransistors |