A 4th order continuous-time [Delta] [Epsilon] ADC with VCO-based integrator and quantizer
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.
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Format: | Thesis |
Language: | eng |
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Massachusetts Institute of Technology
2009
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Online Access: | http://hdl.handle.net/1721.1/47755 |
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author | Park, Matthew Jeremiah |
author2 | Michael H. Perrott. |
author_facet | Michael H. Perrott. Park, Matthew Jeremiah |
author_sort | Park, Matthew Jeremiah |
collection | MIT |
description | Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009. |
first_indexed | 2024-09-23T10:47:02Z |
format | Thesis |
id | mit-1721.1/47755 |
institution | Massachusetts Institute of Technology |
language | eng |
last_indexed | 2024-09-23T10:47:02Z |
publishDate | 2009 |
publisher | Massachusetts Institute of Technology |
record_format | dspace |
spelling | mit-1721.1/477552019-04-12T20:14:36Z A 4th order continuous-time [Delta] [Epsilon] ADC with VCO-based integrator and quantizer Fourth order continuous-time [Delta] [Epsilon] ADC with VCO-based integrator and quantize Park, Matthew Jeremiah Michael H. Perrott. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009. In title on title page, "[Delta]" and "[Epsilon]" appear as upper-case Greek letters. Includes bibliographical references (p. 135-140). The use of a VCO-based integrator and quantizer within a continuous-time (CT) [Delta] [Epsilon] analog-to-digital converter (ADC) structure is explored, and a custom prototype in a 0.13 [mu]m CMOS with a measured performance of 81.2/78.1 dB SNR/SNDR over a 20 MHz bandwidth while consuming 87 mW from a 1.5V supply and occupying an active area of 0.45 mm2 demonstrated. A key innovation is the explicit use of the oscillator's output phase to avoid the signal distortion that had severely limited the performance of earlier VCO-based ADC's, which exclusively made use of the output frequency. Furthermore, the proposed architecture includes a scheme for performing fast dynamic element matching (DEM), enabling first-order shaping of unit-element mismatch in all feedback DAC's. by Matthew Jeremiah Park. Ph.D. 2009-10-01T15:38:49Z 2009-10-01T15:38:49Z 2009 2009 Thesis http://hdl.handle.net/1721.1/47755 428817944 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 140 p. application/pdf Massachusetts Institute of Technology |
spellingShingle | Electrical Engineering and Computer Science. Park, Matthew Jeremiah A 4th order continuous-time [Delta] [Epsilon] ADC with VCO-based integrator and quantizer |
title | A 4th order continuous-time [Delta] [Epsilon] ADC with VCO-based integrator and quantizer |
title_full | A 4th order continuous-time [Delta] [Epsilon] ADC with VCO-based integrator and quantizer |
title_fullStr | A 4th order continuous-time [Delta] [Epsilon] ADC with VCO-based integrator and quantizer |
title_full_unstemmed | A 4th order continuous-time [Delta] [Epsilon] ADC with VCO-based integrator and quantizer |
title_short | A 4th order continuous-time [Delta] [Epsilon] ADC with VCO-based integrator and quantizer |
title_sort | 4th order continuous time delta epsilon adc with vco based integrator and quantizer |
topic | Electrical Engineering and Computer Science. |
url | http://hdl.handle.net/1721.1/47755 |
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