Asynchronous data-dependent jitter compensation

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.

Bibliographic Details
Main Author: Price, Michael, Ph. D. (Michael R.). Massachusetts Institute of Technology
Other Authors: Vladimir M. Stojanovic and Michael St. Germain.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2010
Subjects:
Online Access:http://hdl.handle.net/1721.1/52771
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author Price, Michael, Ph. D. (Michael R.). Massachusetts Institute of Technology
author2 Vladimir M. Stojanovic and Michael St. Germain.
author_facet Vladimir M. Stojanovic and Michael St. Germain.
Price, Michael, Ph. D. (Michael R.). Massachusetts Institute of Technology
author_sort Price, Michael, Ph. D. (Michael R.). Massachusetts Institute of Technology
collection MIT
description Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.
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spelling mit-1721.1/527712019-04-12T17:45:41Z Asynchronous data-dependent jitter compensation Price, Michael, Ph. D. (Michael R.). Massachusetts Institute of Technology Vladimir M. Stojanovic and Michael St. Germain. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009. This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. Includes bibliographical references (p. 95-96). Data-dependent jitter (DDJ) caused by lossy channels is a limiting factor in the bit rates that can be achieved reliably over serial links. This thesis explains the causes of DDJ and existing equalization techniques, then develops an asynchronous (clock-agnostic) architecture for DDJ compensation. The compensation circuit alters the transition times of a digital signal to cancel the expected channel-induced delays. It is designed for a 0.35 [mu]m BiCMOS process with a 240 x 140 ¹m footprint and typically consumes 3.4 mA, a small fraction of the current used in a typical transmitter. Extensive simulations demonstrate that the circuit has the potential to reduce channel-induced DDJ by at least 50% at bit rates of 6.25 Gb/s and 10 Gb/s. by Michael Price. M.Eng. 2010-03-24T20:36:00Z 2010-03-24T20:36:00Z 2009 2009 Thesis http://hdl.handle.net/1721.1/52771 516191892 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 96 p. application/pdf Massachusetts Institute of Technology
spellingShingle Electrical Engineering and Computer Science.
Price, Michael, Ph. D. (Michael R.). Massachusetts Institute of Technology
Asynchronous data-dependent jitter compensation
title Asynchronous data-dependent jitter compensation
title_full Asynchronous data-dependent jitter compensation
title_fullStr Asynchronous data-dependent jitter compensation
title_full_unstemmed Asynchronous data-dependent jitter compensation
title_short Asynchronous data-dependent jitter compensation
title_sort asynchronous data dependent jitter compensation
topic Electrical Engineering and Computer Science.
url http://hdl.handle.net/1721.1/52771
work_keys_str_mv AT pricemichaelphdmichaelrmassachusettsinstituteoftechnology asynchronousdatadependentjittercompensation