A test structure for the measurement and characterization of layout-induced transistor variation

A test structure for the measurement and characterization of layout-induced transistor variation

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.

Bibliographic Details
Main Author: Chang, Albert Hsu Ting
Other Authors: Duane S. Boning.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2010
Subjects:
Electrical Engineering and Computer Science.
Online Access:http://hdl.handle.net/1721.1/52780

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