Breakdown Voltage for Superjunction Power Devices With Charge Imbalance: An Analytical Model Valid for Both Punch Through and Non Punch Through Devices
An analytical model for the electric field and the breakdown voltage (BV) of an unbalanced superjunction (SJ) device is presented in this paper. The analytical technique uses a superposition approach treating the asymmetric charge in the pillars as an excess charge component superimposed on a balanc...
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| Format: | Article |
| Language: | en_US |
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Institute of Electrical and Electronics Engineers
2010
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| Online Access: | http://hdl.handle.net/1721.1/54726 |
| _version_ | 1826205893389189120 |
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| author | Wang, Han Napoli, Ettore Udrea, Florin |
| author2 | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
| author_facet | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Wang, Han Napoli, Ettore Udrea, Florin |
| author_sort | Wang, Han |
| collection | MIT |
| description | An analytical model for the electric field and the breakdown voltage (BV) of an unbalanced superjunction (SJ) device is presented in this paper. The analytical technique uses a superposition approach treating the asymmetric charge in the pillars as an excess charge component superimposed on a balanced charge component. The proposed double-exponential model is able to accurately predict the electric field and the BV for unbalanced SJ devices in both punch through and non punch through conditions. The model is also reasonably accurate at extremely high levels of charge imbalance when the devices behave similarly to a PiN diode or to a high-conductance layer. The analytical model is compared against numerical simulations of charge unbalanced SJ devices and against experimental results. |
| first_indexed | 2024-09-23T13:20:42Z |
| format | Article |
| id | mit-1721.1/54726 |
| institution | Massachusetts Institute of Technology |
| language | en_US |
| last_indexed | 2024-09-23T13:20:42Z |
| publishDate | 2010 |
| publisher | Institute of Electrical and Electronics Engineers |
| record_format | dspace |
| spelling | mit-1721.1/547262022-09-28T13:33:10Z Breakdown Voltage for Superjunction Power Devices With Charge Imbalance: An Analytical Model Valid for Both Punch Through and Non Punch Through Devices Wang, Han Napoli, Ettore Udrea, Florin Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Wang, Han Wang, Han superjunction (SJ) semiconductor device modeling power semiconductor devices charge imbalance (C.I.) SJ modeling Analytical model An analytical model for the electric field and the breakdown voltage (BV) of an unbalanced superjunction (SJ) device is presented in this paper. The analytical technique uses a superposition approach treating the asymmetric charge in the pillars as an excess charge component superimposed on a balanced charge component. The proposed double-exponential model is able to accurately predict the electric field and the BV for unbalanced SJ devices in both punch through and non punch through conditions. The model is also reasonably accurate at extremely high levels of charge imbalance when the devices behave similarly to a PiN diode or to a high-conductance layer. The analytical model is compared against numerical simulations of charge unbalanced SJ devices and against experimental results. 2010-05-05T20:51:59Z 2010-05-05T20:51:59Z 2009-11 2009-10 Article http://purl.org/eprint/type/JournalArticle 0018-9383 http://hdl.handle.net/1721.1/54726 Han Wang, E. Napoli, and F. Udrea. “Breakdown Voltage for Superjunction Power Devices With Charge Imbalance: An Analytical Model Valid for Both Punch Through and Non Punch Through Devices.” Electron Devices, IEEE Transactions on 56.12 (2009): 3175-3183.© 2009 Institute of Electrical and Electronics Engineers. en_US http://dx.doi.org/10.1109/ted.2009.2032595 IEEE Transactions on Electron Devices Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. application/pdf Institute of Electrical and Electronics Engineers IEEE |
| spellingShingle | superjunction (SJ) semiconductor device modeling power semiconductor devices charge imbalance (C.I.) SJ modeling Analytical model Wang, Han Napoli, Ettore Udrea, Florin Breakdown Voltage for Superjunction Power Devices With Charge Imbalance: An Analytical Model Valid for Both Punch Through and Non Punch Through Devices |
| title | Breakdown Voltage for Superjunction Power Devices With Charge Imbalance: An Analytical Model Valid for Both Punch Through and Non Punch Through Devices |
| title_full | Breakdown Voltage for Superjunction Power Devices With Charge Imbalance: An Analytical Model Valid for Both Punch Through and Non Punch Through Devices |
| title_fullStr | Breakdown Voltage for Superjunction Power Devices With Charge Imbalance: An Analytical Model Valid for Both Punch Through and Non Punch Through Devices |
| title_full_unstemmed | Breakdown Voltage for Superjunction Power Devices With Charge Imbalance: An Analytical Model Valid for Both Punch Through and Non Punch Through Devices |
| title_short | Breakdown Voltage for Superjunction Power Devices With Charge Imbalance: An Analytical Model Valid for Both Punch Through and Non Punch Through Devices |
| title_sort | breakdown voltage for superjunction power devices with charge imbalance an analytical model valid for both punch through and non punch through devices |
| topic | superjunction (SJ) semiconductor device modeling power semiconductor devices charge imbalance (C.I.) SJ modeling Analytical model |
| url | http://hdl.handle.net/1721.1/54726 |
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