Structure/processing relationships in vapor-liquid-solid nanowire epitaxy

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2010.

Bibliographic Details
Main Author: Boles, Steven Tyler
Other Authors: Eugene A. Fitzgerald and Carl V. Thompson II.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2010
Subjects:
Online Access:http://hdl.handle.net/1721.1/59003
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author Boles, Steven Tyler
author2 Eugene A. Fitzgerald and Carl V. Thompson II.
author_facet Eugene A. Fitzgerald and Carl V. Thompson II.
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description Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2010.
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spelling mit-1721.1/590032019-04-10T16:50:33Z Structure/processing relationships in vapor-liquid-solid nanowire epitaxy Boles, Steven Tyler Eugene A. Fitzgerald and Carl V. Thompson II. Massachusetts Institute of Technology. Dept. of Materials Science and Engineering. Massachusetts Institute of Technology. Dept. of Materials Science and Engineering. Materials Science and Engineering. Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2010. This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. Cataloged from student submitted PDF version of thesis. Includes bibliographical references (p. 145-151). The synthesis of Si and III-V nanowires using the vapor-liquid-solid (VLS) growth mechanism and low-cost Si substrates was investigated. The VLS mechanism allows fabrication of heterostructures which are not readily attainable using traditional thin-film metalorganic chemical vapor deposition (MOCVD). In addition to these heterostructures, the VLS mechanism allows exploration of Si substrates as platforms for advanced III-V devices, a long-standing goal of the III-V research community, because of the potential for significant cost reductions. The approach to nanowire development first began by focusing on the binary Au/Si system. This system allowed us to understand critical parameters of our process including e-beam evaporation of Au thin-films, deposition of Au-colloid particles, pregrowth cleaning procedures and CVD growth conditions and times. Once controllable and repeatable Si nanowire epitaxy on Si substrates was established, we were able to focus on development of both III-V wires on Si substrates as well as Si substrates with topographic features and silicon-on-insulator (SOI) wafers. Growth abnormalities between Au-colloid nanoparticle catalysts and Au thin-film catalysts revealed a correlation between Au coverage on the substrate surface and Si nanowire growth rate. We found an increasing growth rate with increasing concentrations of Au catalyst particles on the wafer surface. Systematic experiments relating the nanowire growth rate to the proximity of nearest-neighbor Au-particles and Au-reservoirs were carried out and the results were found to be in good agreement with a SiH4 reaction model which associates decomposition to form SiH2 with higher nanowire growth rates. III-V nanowire growth on Si substrates was investigated as a possible route to the realization of high performance compound semiconductor devices on low cost substrates. For this study, GaP and InP were chosen as starting points for III-V nanowire integration with Si. Initial studies which focused on III-V wire epitaxy found that when Au-catalyst particles were treated with the group-III precursors before growth, there was an increase in the fraction of catalyst particles yielding wire growth and in the number of wires growing vertically from the substrate. Axial nanowire heterostructures of GaP(w)/InP(w)/GaP(w) were fabricated using MOCVD on Si (111) substrates. Growth temperature was found to be critical in the formation of GaP/InP axial heterostructures with minimal simultaneous lateral 3 overgrowth of InP. Analysis of the second GaP segment on InP suggests that an increase in growth temperature while Au is in direct contact with InP results in the InP dissolving into the Au particle and disappearance of the heterostructure. Si substrates were used as a foundation to explore more complex silicon structures, such as ordered arrays and SOI architectures. Although several routes initially looked promising for ordered array development, inverted pyramid arrays on Si (100) substrates were found to be the most successful. Silicon-on-insulator substrates were also explored for VLS nanowire growth and both Si nanowire field effect transistors and GaP nanowire cantilevers were successfully demonstrated on this platform. by Steven Tyler Boles. Ph.D. 2010-10-08T20:36:43Z 2010-10-08T20:36:43Z 2010 2010 Thesis http://hdl.handle.net/1721.1/59003 666377857 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 155 p. application/pdf Massachusetts Institute of Technology
spellingShingle Materials Science and Engineering.
Boles, Steven Tyler
Structure/processing relationships in vapor-liquid-solid nanowire epitaxy
title Structure/processing relationships in vapor-liquid-solid nanowire epitaxy
title_full Structure/processing relationships in vapor-liquid-solid nanowire epitaxy
title_fullStr Structure/processing relationships in vapor-liquid-solid nanowire epitaxy
title_full_unstemmed Structure/processing relationships in vapor-liquid-solid nanowire epitaxy
title_short Structure/processing relationships in vapor-liquid-solid nanowire epitaxy
title_sort structure processing relationships in vapor liquid solid nanowire epitaxy
topic Materials Science and Engineering.
url http://hdl.handle.net/1721.1/59003
work_keys_str_mv AT bolessteventyler structureprocessingrelationshipsinvaporliquidsolidnanowireepitaxy