Designing Energy-Efficient Low-Diameter On-chip Networks with Equalized Interconnects
In a power and area constrained multicore system, the on-chip communication network needs to be carefully designed to maximize the system performance and programmer productivity while minimizing energy and area. In this paper, we explore the design of energy-efficient low-diameter networks (flattene...
Main Authors: | Joshi, Ajay J., Kim, Byungsub, Stojanovic, Vladimir Marko |
---|---|
Other Authors: | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
Format: | Article |
Language: | en_US |
Published: |
Institute of Electrical and Electronics Engineers
2010
|
Subjects: | |
Online Access: | http://hdl.handle.net/1721.1/59419 |
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