Implementing extreme upsampling filters with a multiply-less architecture
For ease of implementation, communications systems have been steadily converted to digital implementations. FPGA technologies and high-quality, high-speed DACs have enabled this trend. While this is commonly done for modern high bit-rate communications systems, legacy systems like the MIL-STD-188-16...
| Автори: | , , , , |
|---|---|
| Інші автори: | |
| Формат: | Стаття |
| Мова: | en_US |
| Опубліковано: |
Institute of Electrical and Electronics Engineers
2010
|
| Онлайн доступ: | http://hdl.handle.net/1721.1/59522 |
| _version_ | 1826194847747276800 |
|---|---|
| author | Hillger, Jason J. Timmerman, Chayil S. Ramakrishnan, Balasubramanian Laffely, Andrew Yao, Huan |
| author2 | Lincoln Laboratory |
| author_facet | Lincoln Laboratory Hillger, Jason J. Timmerman, Chayil S. Ramakrishnan, Balasubramanian Laffely, Andrew Yao, Huan |
| author_sort | Hillger, Jason J. |
| collection | MIT |
| description | For ease of implementation, communications systems have been steadily converted to digital implementations. FPGA technologies and high-quality, high-speed DACs have enabled this trend. While this is commonly done for modern high bit-rate communications systems, legacy systems like the MIL-STD-188-165A modem are not often considered. One issue is the need to up-sample these slower standards by factors of tens of thousands in order to interface them with the modulation system. This paper presents an architectural case study on the implementation of a direct digital synthesis MIL-STD-188-165A modem. It briefly describes a multiply-less single stage filter architecture with unlimited up-sampling capabilities. The filter implements a Farrow type design. By selecting the appropriate filter coefficients from a set of look-up-tables (LUT) the filter can be designed to suppress harmonic distortion below the required filter mask. Mathematical evaluation of these properties proves that a reasonable size LUT of 1024x14 bits is sufficient to suppress harmonics below - 60 dB. A full analysis of harmonic suppression vs. LUT size is included to extend this work beyond the MIL-STD-188-165A case study. |
| first_indexed | 2024-09-23T10:02:48Z |
| format | Article |
| id | mit-1721.1/59522 |
| institution | Massachusetts Institute of Technology |
| language | en_US |
| last_indexed | 2024-09-23T10:02:48Z |
| publishDate | 2010 |
| publisher | Institute of Electrical and Electronics Engineers |
| record_format | dspace |
| spelling | mit-1721.1/595222022-09-30T18:34:16Z Implementing extreme upsampling filters with a multiply-less architecture Hillger, Jason J. Timmerman, Chayil S. Ramakrishnan, Balasubramanian Laffely, Andrew Yao, Huan Lincoln Laboratory Hillger, Jason J. Hillger, Jason J. Timmerman, Chayil S. Yao, Huan For ease of implementation, communications systems have been steadily converted to digital implementations. FPGA technologies and high-quality, high-speed DACs have enabled this trend. While this is commonly done for modern high bit-rate communications systems, legacy systems like the MIL-STD-188-165A modem are not often considered. One issue is the need to up-sample these slower standards by factors of tens of thousands in order to interface them with the modulation system. This paper presents an architectural case study on the implementation of a direct digital synthesis MIL-STD-188-165A modem. It briefly describes a multiply-less single stage filter architecture with unlimited up-sampling capabilities. The filter implements a Farrow type design. By selecting the appropriate filter coefficients from a set of look-up-tables (LUT) the filter can be designed to suppress harmonic distortion below the required filter mask. Mathematical evaluation of these properties proves that a reasonable size LUT of 1024x14 bits is sufficient to suppress harmonics below - 60 dB. A full analysis of harmonic suppression vs. LUT size is included to extend this work beyond the MIL-STD-188-165A case study. United States. Dept. of the Air Force (contract FA8721-05-C-0002) 2010-10-26T17:12:32Z 2010-10-26T17:12:32Z 2010-01 2009-10 Article http://purl.org/eprint/type/JournalArticle 978-1-4244-5238-5 INSPEC Accession Number: 11104271 http://hdl.handle.net/1721.1/59522 Laffely, A. et al. “Implementing extreme upsampling filters with a multiply-less architecture.” Military Communications Conference, 2009. MILCOM 2009. IEEE. 2009. 1-5. © 2010 Institute of Electrical and Electronics Engineers. en_US http://dx.doi.org/10.1109/MILCOM.2009.5379811 IEEE Military Communications Conference, 2009. MILCOM 2009 Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. application/pdf Institute of Electrical and Electronics Engineers IEEE |
| spellingShingle | Hillger, Jason J. Timmerman, Chayil S. Ramakrishnan, Balasubramanian Laffely, Andrew Yao, Huan Implementing extreme upsampling filters with a multiply-less architecture |
| title | Implementing extreme upsampling filters with a multiply-less architecture |
| title_full | Implementing extreme upsampling filters with a multiply-less architecture |
| title_fullStr | Implementing extreme upsampling filters with a multiply-less architecture |
| title_full_unstemmed | Implementing extreme upsampling filters with a multiply-less architecture |
| title_short | Implementing extreme upsampling filters with a multiply-less architecture |
| title_sort | implementing extreme upsampling filters with a multiply less architecture |
| url | http://hdl.handle.net/1721.1/59522 |
| work_keys_str_mv | AT hillgerjasonj implementingextremeupsamplingfilterswithamultiplylessarchitecture AT timmermanchayils implementingextremeupsamplingfilterswithamultiplylessarchitecture AT ramakrishnanbalasubramanian implementingextremeupsamplingfilterswithamultiplylessarchitecture AT laffelyandrew implementingextremeupsamplingfilterswithamultiplylessarchitecture AT yaohuan implementingextremeupsamplingfilterswithamultiplylessarchitecture |